@@ -1924,11 +1924,6 @@ int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
/* i915_gem_gtt.c */
bool intel_enable_ppgtt(struct drm_device *dev);
int i915_gem_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
-void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt,
- struct drm_i915_gem_object *obj,
- enum i915_cache_level cache_level);
-void i915_ppgtt_unbind_object(struct i915_hw_ppgtt *ppgtt,
- struct drm_i915_gem_object *obj);
void i915_gem_restore_gtt_mappings(struct drm_device *dev);
int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj);
/* FIXME: this is never okay with full PPGTT */
@@ -449,28 +449,6 @@ int i915_gem_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
return ret;
}
-void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt,
- struct drm_i915_gem_object *obj,
- enum i915_cache_level cache_level)
-{
- struct i915_address_space *vm = &ppgtt->base;
- unsigned long obj_offset = i915_gem_obj_offset(obj, vm);
-
- vm->insert_entries(vm, obj->pages,
- obj_offset >> PAGE_SHIFT,
- cache_level);
-}
-
-void i915_ppgtt_unbind_object(struct i915_hw_ppgtt *ppgtt,
- struct drm_i915_gem_object *obj)
-{
- struct i915_address_space *vm = &ppgtt->base;
- unsigned long obj_offset = i915_gem_obj_offset(obj, vm);
-
- vm->clear_range(vm, obj_offset >> PAGE_SHIFT,
- obj->base.size >> PAGE_SHIFT);
-}
-
extern int intel_iommu_gfx_mapped;
/* Certain Gen5 chipsets require require idling the GPU before
* unmapping anything from the GTT when VT-d is enabled.
vm->insert_entries was good enough. We can bring this function back later if needed. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- drivers/gpu/drm/i915/i915_drv.h | 5 ----- drivers/gpu/drm/i915/i915_gem_gtt.c | 22 ---------------------- 2 files changed, 27 deletions(-)