diff mbox

drm/intel: add enable_psr module option

Message ID 1372441660-10377-1-git-send-email-rodrigo.vivi@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rodrigo Vivi June 28, 2013, 5:47 p.m. UTC 
PSR is enabled by default but can be disabled.

v2: prefer seq_puts to seq_printf detected by Paulo Zanoni.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 3 +++
 drivers/gpu/drm/i915/i915_drv.c     | 4 ++++
 drivers/gpu/drm/i915/i915_drv.h     | 2 ++
 drivers/gpu/drm/i915/intel_dp.c     | 6 ++++++
 4 files changed, 15 insertions(+)

Comments

Paulo Zanoni July 8, 2013, 12:45 p.m. UTC | #1 
2013/6/28 Rodrigo Vivi <rodrigo.vivi@gmail.com>:
> PSR is enabled by default but can be disabled.
>
> v2: prefer seq_puts to seq_printf detected by Paulo Zanoni.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 3 +++
>  drivers/gpu/drm/i915/i915_drv.c     | 4 ++++
>  drivers/gpu/drm/i915/i915_drv.h     | 2 ++
>  drivers/gpu/drm/i915/intel_dp.c     | 6 ++++++
>  4 files changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 95b27ac..9d8d789 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1895,6 +1895,9 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
>                 case PSR_NO_SINK:
>                         seq_puts(m, "not supported by panel");
>                         break;
> +               case PSR_MODULE_PARAM:
> +                       seq_puts(m, "disabled by flag");
> +                       break;
>                 case PSR_CRTC_NOT_ACTIVE:
>                         seq_puts(m, "crtc not active");
>                         break;
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 062cbda..7920c6f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -118,6 +118,10 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
>  MODULE_PARM_DESC(i915_enable_ppgtt,
>                 "Enable PPGTT (default: true)");
>
> +int i915_enable_psr __read_mostly = 1;
> +module_param_named(enable_psr, i915_enable_psr, int, 0600);
> +MODULE_PARM_DESC(enable_psr, "Enable PSR (default: true)");
> +
>  unsigned int i915_preliminary_hw_support __read_mostly = 0;
>  module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
>  MODULE_PARM_DESC(preliminary_hw_support,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f08c1d9..dda992a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -546,6 +546,7 @@ enum no_fbc_reason {
>  enum no_psr_reason {
>         PSR_NO_SOURCE, /* Not supported on platform */
>         PSR_NO_SINK, /* Not supported by panel */
> +       PSR_MODULE_PARAM,
>         PSR_CRTC_NOT_ACTIVE,
>         PSR_PWR_WELL_ENABLED,
>         PSR_NOT_TILED,
> @@ -1555,6 +1556,7 @@ extern int i915_enable_rc6 __read_mostly;
>  extern int i915_enable_fbc __read_mostly;
>  extern bool i915_enable_hangcheck __read_mostly;
>  extern int i915_enable_ppgtt __read_mostly;
> +extern int i915_enable_psr __read_mostly;
>  extern unsigned int i915_preliminary_hw_support __read_mostly;
>  extern int i915_disable_power_well __read_mostly;
>  extern int i915_enable_ips __read_mostly;
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 86c1a7d..5d961cb 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1500,6 +1500,12 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
>                 return false;
>         }
>
> +       if (!i915_enable_psr) {
> +               DRM_DEBUG_KMS("PSR disable by flag\n");

disableD by flag?

With that fixed: Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> +               dev_priv->no_psr_reason = PSR_MODULE_PARAM;
> +               return false;
> +       }
> +
>         if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) {
>                 DRM_DEBUG_KMS("crtc not active for PSR\n");
>                 dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
> --
> 1.8.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 95b27ac..9d8d789 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1895,6 +1895,9 @@  static int i915_edp_psr_status(struct seq_file *m, void *data)
 		case PSR_NO_SINK:
 			seq_puts(m, "not supported by panel");
 			break;
+		case PSR_MODULE_PARAM:
+			seq_puts(m, "disabled by flag");
+			break;
 		case PSR_CRTC_NOT_ACTIVE:
 			seq_puts(m, "crtc not active");
 			break;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 062cbda..7920c6f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -118,6 +118,10 @@  module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
 MODULE_PARM_DESC(i915_enable_ppgtt,
 		"Enable PPGTT (default: true)");
 
+int i915_enable_psr __read_mostly = 1;
+module_param_named(enable_psr, i915_enable_psr, int, 0600);
+MODULE_PARM_DESC(enable_psr, "Enable PSR (default: true)");
+
 unsigned int i915_preliminary_hw_support __read_mostly = 0;
 module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
 MODULE_PARM_DESC(preliminary_hw_support,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f08c1d9..dda992a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -546,6 +546,7 @@  enum no_fbc_reason {
 enum no_psr_reason {
 	PSR_NO_SOURCE, /* Not supported on platform */
 	PSR_NO_SINK, /* Not supported by panel */
+	PSR_MODULE_PARAM,
 	PSR_CRTC_NOT_ACTIVE,
 	PSR_PWR_WELL_ENABLED,
 	PSR_NOT_TILED,
@@ -1555,6 +1556,7 @@  extern int i915_enable_rc6 __read_mostly;
 extern int i915_enable_fbc __read_mostly;
 extern bool i915_enable_hangcheck __read_mostly;
 extern int i915_enable_ppgtt __read_mostly;
+extern int i915_enable_psr __read_mostly;
 extern unsigned int i915_preliminary_hw_support __read_mostly;
 extern int i915_disable_power_well __read_mostly;
 extern int i915_enable_ips __read_mostly;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 86c1a7d..5d961cb 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1500,6 +1500,12 @@  static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
 		return false;
 	}
 
+	if (!i915_enable_psr) {
+		DRM_DEBUG_KMS("PSR disable by flag\n");
+		dev_priv->no_psr_reason = PSR_MODULE_PARAM;
+		return false;
+	}
+
 	if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) {
 		DRM_DEBUG_KMS("crtc not active for PSR\n");
 		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;