diff mbox

[15/35] drm/i915: Print the watermark latencies during init

Message ID 1373014667-19484-16-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä July 5, 2013, 8:57 a.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Seeing the watermark latency values in dmesg might help sometimes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

Comments

Paulo Zanoni July 30, 2013, 9:49 p.m. UTC | #1 
2013/7/5  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Seeing the watermark latency values in dmesg might help sometimes.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 37919df..5687957 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2392,6 +2392,24 @@ static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
>                 wm[3] *= 2;
>  }
>
> +static void intel_print_wm_latency(struct drm_device *dev, const uint16_t wm[5])
> +{
> +       int level;
> +
> +       for (level = 0; level <= 4; level++) {
> +               unsigned int latency = wm[level];
> +
> +               if (latency == 0)
> +                       continue;

One of the cases that should be interesting to print is exactly when a
latency we expect to be non-zero is zero. Maybe you should do a simple
"switch" statement to get max_level depending on Gen number and print
everything from level 0 to max_level? Then if "latency == 0" we could
even promote the message to a DRM_ERROR?

> +
> +               if (level > 0)
> +                       latency *= 5;
> +
> +               DRM_DEBUG_KMS(" WM%d latency %u (%u.%u usec)\n",
> +                             level, wm[level], latency / 10, latency % 10);
> +       }
> +}
> +
>  static void intel_setup_wm_latency(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -2405,6 +2423,13 @@ static void intel_setup_wm_latency(struct drm_device *dev)
>
>         intel_fixup_spr_wm_latency(dev, dev_priv->wm.spr_latency);
>         intel_fixup_cur_wm_latency(dev, dev_priv->wm.cur_latency);
> +
> +       DRM_DEBUG_KMS("Primary watermark latencies:\n");
> +       intel_print_wm_latency(dev, dev_priv->wm.pri_latency);
> +       DRM_DEBUG_KMS("Sprite watermark latencies:\n");
> +       intel_print_wm_latency(dev, dev_priv->wm.spr_latency);
> +       DRM_DEBUG_KMS("Cursor watermark latencies:\n");
> +       intel_print_wm_latency(dev, dev_priv->wm.cur_latency);
>  }
>
>  static void hsw_compute_wm_parameters(struct drm_device *dev,
> --
> 1.8.1.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ville Syrjälä July 31, 2013, 9:47 a.m. UTC | #2 
On Tue, Jul 30, 2013 at 06:49:27PM -0300, Paulo Zanoni wrote:
> 2013/7/5  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Seeing the watermark latency values in dmesg might help sometimes.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++++++++++++++++++
> >  1 file changed, 25 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 37919df..5687957 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2392,6 +2392,24 @@ static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
> >                 wm[3] *= 2;
> >  }
> >
> > +static void intel_print_wm_latency(struct drm_device *dev, const uint16_t wm[5])
> > +{
> > +       int level;
> > +
> > +       for (level = 0; level <= 4; level++) {
> > +               unsigned int latency = wm[level];
> > +
> > +               if (latency == 0)
> > +                       continue;
> 
> One of the cases that should be interesting to print is exactly when a
> latency we expect to be non-zero is zero. Maybe you should do a simple
> "switch" statement to get max_level depending on Gen number and print
> everything from level 0 to max_level? Then if "latency == 0" we could
> even promote the message to a DRM_ERROR?

Yeah could be done. OTOH if it really happens in the wild, we'd probably
be looking at a bunch of new bug reports that we can't do anything
about.

> > +
> > +               if (level > 0)
> > +                       latency *= 5;
> > +
> > +               DRM_DEBUG_KMS(" WM%d latency %u (%u.%u usec)\n",
> > +                             level, wm[level], latency / 10, latency % 10);
> > +       }
> > +}
> > +
> >  static void intel_setup_wm_latency(struct drm_device *dev)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> > @@ -2405,6 +2423,13 @@ static void intel_setup_wm_latency(struct drm_device *dev)
> >
> >         intel_fixup_spr_wm_latency(dev, dev_priv->wm.spr_latency);
> >         intel_fixup_cur_wm_latency(dev, dev_priv->wm.cur_latency);
> > +
> > +       DRM_DEBUG_KMS("Primary watermark latencies:\n");
> > +       intel_print_wm_latency(dev, dev_priv->wm.pri_latency);
> > +       DRM_DEBUG_KMS("Sprite watermark latencies:\n");
> > +       intel_print_wm_latency(dev, dev_priv->wm.spr_latency);
> > +       DRM_DEBUG_KMS("Cursor watermark latencies:\n");
> > +       intel_print_wm_latency(dev, dev_priv->wm.cur_latency);
> >  }
> >
> >  static void hsw_compute_wm_parameters(struct drm_device *dev,
> > --
> > 1.8.1.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 37919df..5687957 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2392,6 +2392,24 @@  static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
 		wm[3] *= 2;
 }
 
+static void intel_print_wm_latency(struct drm_device *dev, const uint16_t wm[5])
+{
+	int level;
+
+	for (level = 0; level <= 4; level++) {
+		unsigned int latency = wm[level];
+
+		if (latency == 0)
+			continue;
+
+		if (level > 0)
+			latency *= 5;
+
+		DRM_DEBUG_KMS(" WM%d latency %u (%u.%u usec)\n",
+			      level, wm[level], latency / 10, latency % 10);
+	}
+}
+
 static void intel_setup_wm_latency(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2405,6 +2423,13 @@  static void intel_setup_wm_latency(struct drm_device *dev)
 
 	intel_fixup_spr_wm_latency(dev, dev_priv->wm.spr_latency);
 	intel_fixup_cur_wm_latency(dev, dev_priv->wm.cur_latency);
+
+	DRM_DEBUG_KMS("Primary watermark latencies:\n");
+	intel_print_wm_latency(dev, dev_priv->wm.pri_latency);
+	DRM_DEBUG_KMS("Sprite watermark latencies:\n");
+	intel_print_wm_latency(dev, dev_priv->wm.spr_latency);
+	DRM_DEBUG_KMS("Cursor watermark latencies:\n");
+	intel_print_wm_latency(dev, dev_priv->wm.cur_latency);
 }
 
 static void hsw_compute_wm_parameters(struct drm_device *dev,