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[16/35] drm/i915: Disable specific watermark levels when latency is zero

Message ID 1373014667-19484-17-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä July 5, 2013, 8:57 a.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Return UINT_MAX for the calculated WM level if the latency is zero.
This will lead to marking the WM level as disabled.

I'm not sure if latency==0 should mean that we want to disable the
level. But that's the implication I got from the fact that we don't
even enable the watermark code of the SSKDP register is 0.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Paulo Zanoni July 30, 2013, 9:51 p.m. UTC | #1
2013/7/5  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Return UINT_MAX for the calculated WM level if the latency is zero.
> This will lead to marking the WM level as disabled.
>
> I'm not sure if latency==0 should mean that we want to disable the
> level. But that's the implication I got from the fact that we don't
> even enable the watermark code of the SSKDP register is 0.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 5687957..a919445 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2116,6 +2116,9 @@ static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
>  {
>         uint64_t ret;
>
> +       if (latency == 0)
> +               return UINT_MAX;

IMHO we should scream loud.

> +
>         ret = (uint64_t) pixel_rate * bytes_per_pixel * latency;
>         ret = DIV_ROUND_UP_ULL(ret, 64 * 10000) + 2;
>
> @@ -2128,6 +2131,9 @@ static uint32_t ilk_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
>  {
>         uint32_t ret;
>
> +       if (latency == 0)
> +               return UINT_MAX;
> +
>         ret = (latency * pixel_rate) / (pipe_htotal * 10000);
>         ret = (ret + 1) * horiz_pixels * bytes_per_pixel;
>         ret = DIV_ROUND_UP(ret, 64) + 2;
> --
> 1.8.1.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5687957..a919445 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2116,6 +2116,9 @@  static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
 {
 	uint64_t ret;
 
+	if (latency == 0)
+		return UINT_MAX;
+
 	ret = (uint64_t) pixel_rate * bytes_per_pixel * latency;
 	ret = DIV_ROUND_UP_ULL(ret, 64 * 10000) + 2;
 
@@ -2128,6 +2131,9 @@  static uint32_t ilk_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
 {
 	uint32_t ret;
 
+	if (latency == 0)
+		return UINT_MAX;
+
 	ret = (latency * pixel_rate) / (pipe_htotal * 10000);
 	ret = (ret + 1) * horiz_pixels * bytes_per_pixel;
 	ret = DIV_ROUND_UP(ret, 64) + 2;