diff mbox

[33/35] hack: Don't disable underrun reporting on the first error on ILK/SNB/IVB

Message ID 1373014667-19484-34-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä July 5, 2013, 8:57 a.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Don't want to lose them in the noise. Just let them happen.
---
 drivers/gpu/drm/i915/i915_irq.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Paulo Zanoni July 5, 2013, 5:19 p.m. UTC | #1
2013/7/5  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Don't want to lose them in the noise. Just let them happen.

When I was experimenting with this, I noticed that when we get
underruns, we get thousands of underruns per second, until we fix the
condition that is causing the underruns. With this we'll get tons and
tons and tons of interrupts and really flood dmesg.

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index ee5127f..10554bf 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1102,15 +1102,15 @@ static void ivb_err_int_handler(struct drm_device *dev)
>                 DRM_ERROR("Poison interrupt\n");
>
>         if (err_int & ERR_INT_FIFO_UNDERRUN_A)
> -               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
> +               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, true))
>                         DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
>
>         if (err_int & ERR_INT_FIFO_UNDERRUN_B)
> -               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
> +               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, true))
>                         DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
>
>         if (err_int & ERR_INT_FIFO_UNDERRUN_C)
> -               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_C, false))
> +               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_C, true))
>                         DRM_DEBUG_DRIVER("Pipe C FIFO underrun\n");
>
>         I915_WRITE(GEN7_ERR_INT, err_int);
> @@ -1359,11 +1359,11 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>                 DRM_ERROR("Poison interrupt\n");
>
>         if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
> -               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
> +               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, true))
>                         DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
>
>         if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
> -               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
> +               if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, true))
>                         DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
>
>         if (de_iir & DE_PLANEA_FLIP_DONE) {
> --
> 1.8.1.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ville Syrjälä July 5, 2013, 5:34 p.m. UTC | #2
On Fri, Jul 05, 2013 at 02:19:22PM -0300, Paulo Zanoni wrote:
> 2013/7/5  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Don't want to lose them in the noise. Just let them happen.
> 
> When I was experimenting with this, I noticed that when we get
> underruns, we get thousands of underruns per second, until we fix the
> condition that is causing the underruns. With this we'll get tons and
> tons and tons of interrupts and really flood dmesg.

Yeah. It was just a hack to see if the code managed to apply the
watermarks in time before the pipe really starts to demand pixels. If
you actually configure the system so that it constantly underruns
(something we shouldn't allow, but currently we do) your dmesg will be
full of this stuff.

Clearly we can't even being to consider merging a patch like this
before we have much stricter checks to prevent such mode/plane
configurations. I guess even then some ratelimiting might be a
good idea, just in case.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ee5127f..10554bf 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1102,15 +1102,15 @@  static void ivb_err_int_handler(struct drm_device *dev)
 		DRM_ERROR("Poison interrupt\n");
 
 	if (err_int & ERR_INT_FIFO_UNDERRUN_A)
-		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, true))
 			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
 
 	if (err_int & ERR_INT_FIFO_UNDERRUN_B)
-		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, true))
 			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
 
 	if (err_int & ERR_INT_FIFO_UNDERRUN_C)
-		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_C, false))
+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_C, true))
 			DRM_DEBUG_DRIVER("Pipe C FIFO underrun\n");
 
 	I915_WRITE(GEN7_ERR_INT, err_int);
@@ -1359,11 +1359,11 @@  static irqreturn_t ironlake_irq_handler(int irq, void *arg)
 		DRM_ERROR("Poison interrupt\n");
 
 	if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
-		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, true))
 			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
 
 	if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
-		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, true))
 			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
 
 	if (de_iir & DE_PLANEA_FLIP_DONE) {