| Message ID | 1373403610-1754-1-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2013/7/9 Daniel Vetter <daniel.vetter@ffwll.ch>: > Since the addition of VECS we have a slightly different enable > sequence for PM interrupts on ivb/hsw vs snb and vlv. Usually that > will end up in hard to track down surprises. > > Hence unifiy things and since we have copies of this code in 3 places > now, extract it into its own little helper. > > v3: Rebase on top of the retained double-GTIIR clearing. Also > resurrect the masking/disabling of the gen6+ PM interrupts as spotted > by Ben Widaswky. > > v4: Move the DE interrupt reset code out of gen5_gt_irq_preinstall > back to ironlake_irq_preinstall where it really belongs. Spotted by > Paulo. > > Cc: Paulo Zanoni <przanoni@gmail.com> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> > --- > drivers/gpu/drm/i915/i915_irq.c | 39 +++++++++++++++++++++------------------ > 1 file changed, 21 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index cf1a21a..d5c3bef 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2583,6 +2583,23 @@ static void ibx_irq_preinstall(struct drm_device *dev) > POSTING_READ(SDEIER); > } > > +static void gen5_gt_irq_preinstall(struct drm_device *dev) > +{ > + struct drm_i915_private *dev_priv = dev->dev_private; > + > + /* and GT */ > + I915_WRITE(GTIMR, 0xffffffff); > + I915_WRITE(GTIER, 0x0); > + POSTING_READ(GTIER); > + > + if (INTEL_INFO(dev)->gen >= 6) { > + /* and GT */ This comment should be /* Power management */, but it's completely useless, so you could kill it and also the /* and GT */ above. > + I915_WRITE(GEN6_PMIMR, 0xffffffff); > + I915_WRITE(GEN6_PMIER, 0x0); > + POSTING_READ(GEN6_PMIER); > + } > +} > + > /* drm_dma.h hooks > */ > static void ironlake_irq_preinstall(struct drm_device *dev) > @@ -2593,16 +2610,11 @@ static void ironlake_irq_preinstall(struct drm_device *dev) > > I915_WRITE(HWSTAM, 0xeffe); > > - /* XXX hotplug from PCH */ > - > I915_WRITE(DEIMR, 0xffffffff); > I915_WRITE(DEIER, 0x0); > POSTING_READ(DEIER); > > - /* and GT */ > - I915_WRITE(GTIMR, 0xffffffff); > - I915_WRITE(GTIER, 0x0); > - POSTING_READ(GTIER); > + gen5_gt_irq_preinstall(dev); With this, we're now initializing GEN6_PM* on SandyBridge since it uses ironlake_irq_preinstall. That sounds like a good thing. We could either mention this in the commit message or do it in a separate patch. > > ibx_irq_preinstall(dev); > } > @@ -2621,15 +2633,7 @@ static void ivybridge_irq_preinstall(struct drm_device *dev) > I915_WRITE(DEIER, 0x0); > POSTING_READ(DEIER); > > - /* and GT */ > - I915_WRITE(GTIMR, 0xffffffff); > - I915_WRITE(GTIER, 0x0); > - POSTING_READ(GTIER); > - > - /* Power management */ > - I915_WRITE(GEN6_PMIMR, 0xffffffff); > - I915_WRITE(GEN6_PMIER, 0x0); > - POSTING_READ(GEN6_PMIER); > + gen5_gt_irq_preinstall(dev); > > ibx_irq_preinstall(dev); > } > @@ -2650,9 +2654,8 @@ static void valleyview_irq_preinstall(struct drm_device *dev) > /* and GT */ > I915_WRITE(GTIIR, I915_READ(GTIIR)); > I915_WRITE(GTIIR, I915_READ(GTIIR)); > - I915_WRITE(GTIMR, 0xffffffff); > - I915_WRITE(GTIER, 0x0); > - POSTING_READ(GTIER); > + > + gen5_gt_irq_preinstall(dev); Valleyview is Gen 7, right? So now we're also initializing GEN6_PMI* on it. So same comments from SNB apply here. Maybe you should change the commit title to "Initialize the PM interrupts on SNB and VLV". > > I915_WRITE(DPINVGTT, 0xff); > > -- > 1.8.1.4 >
On Wed, Jul 10, 2013 at 05:05:07PM -0300, Paulo Zanoni wrote: > 2013/7/9 Daniel Vetter <daniel.vetter@ffwll.ch>: > > Since the addition of VECS we have a slightly different enable > > sequence for PM interrupts on ivb/hsw vs snb and vlv. Usually that > > will end up in hard to track down surprises. > > > > Hence unifiy things and since we have copies of this code in 3 places > > now, extract it into its own little helper. > > > > v3: Rebase on top of the retained double-GTIIR clearing. Also > > resurrect the masking/disabling of the gen6+ PM interrupts as spotted > > by Ben Widaswky. > > > > v4: Move the DE interrupt reset code out of gen5_gt_irq_preinstall > > back to ironlake_irq_preinstall where it really belongs. Spotted by > > Paulo. > > > > Cc: Paulo Zanoni <przanoni@gmail.com> > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> > > --- > > drivers/gpu/drm/i915/i915_irq.c | 39 +++++++++++++++++++++------------------ > > 1 file changed, 21 insertions(+), 18 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > > index cf1a21a..d5c3bef 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -2583,6 +2583,23 @@ static void ibx_irq_preinstall(struct drm_device *dev) > > POSTING_READ(SDEIER); > > } > > > > +static void gen5_gt_irq_preinstall(struct drm_device *dev) > > +{ > > + struct drm_i915_private *dev_priv = dev->dev_private; > > + > > + /* and GT */ > > + I915_WRITE(GTIMR, 0xffffffff); > > + I915_WRITE(GTIER, 0x0); > > + POSTING_READ(GTIER); > > + > > + if (INTEL_INFO(dev)->gen >= 6) { > > + /* and GT */ > > This comment should be /* Power management */, but it's completely > useless, so you could kill it and also the /* and GT */ above. Oh, I tend to ignore old comments freely if the contradict reality. I'll update the patch and rip the all out (there's also similarly misleading comments in the upper-level preinstall functions). > > + I915_WRITE(GEN6_PMIMR, 0xffffffff); > > + I915_WRITE(GEN6_PMIER, 0x0); > > + POSTING_READ(GEN6_PMIER); > > + } > > +} > > + > > /* drm_dma.h hooks > > */ > > static void ironlake_irq_preinstall(struct drm_device *dev) > > @@ -2593,16 +2610,11 @@ static void ironlake_irq_preinstall(struct drm_device *dev) > > > > I915_WRITE(HWSTAM, 0xeffe); > > > > - /* XXX hotplug from PCH */ > > - > > I915_WRITE(DEIMR, 0xffffffff); > > I915_WRITE(DEIER, 0x0); > > POSTING_READ(DEIER); > > > > - /* and GT */ > > - I915_WRITE(GTIMR, 0xffffffff); > > - I915_WRITE(GTIER, 0x0); > > - POSTING_READ(GTIER); > > + gen5_gt_irq_preinstall(dev); > > With this, we're now initializing GEN6_PM* on SandyBridge since it > uses ironlake_irq_preinstall. That sounds like a good thing. We could > either mention this in the commit message or do it in a separate > patch. > > > > > > ibx_irq_preinstall(dev); > > } > > @@ -2621,15 +2633,7 @@ static void ivybridge_irq_preinstall(struct drm_device *dev) > > I915_WRITE(DEIER, 0x0); > > POSTING_READ(DEIER); > > > > - /* and GT */ > > - I915_WRITE(GTIMR, 0xffffffff); > > - I915_WRITE(GTIER, 0x0); > > - POSTING_READ(GTIER); > > - > > - /* Power management */ > > - I915_WRITE(GEN6_PMIMR, 0xffffffff); > > - I915_WRITE(GEN6_PMIER, 0x0); > > - POSTING_READ(GEN6_PMIER); > > + gen5_gt_irq_preinstall(dev); > > > > ibx_irq_preinstall(dev); > > } > > @@ -2650,9 +2654,8 @@ static void valleyview_irq_preinstall(struct drm_device *dev) > > /* and GT */ > > I915_WRITE(GTIIR, I915_READ(GTIIR)); > > I915_WRITE(GTIIR, I915_READ(GTIIR)); > > - I915_WRITE(GTIMR, 0xffffffff); > > - I915_WRITE(GTIER, 0x0); > > - POSTING_READ(GTIER); > > + > > + gen5_gt_irq_preinstall(dev); > > Valleyview is Gen 7, right? So now we're also initializing GEN6_PMI* > on it. So same comments from SNB apply here. Maybe you should change > the commit title to "Initialize the PM interrupts on SNB and VLV". Hm, that's actually the change I wanted to do to. Note that on SNB/VLV we already initialize those interrupts in the gen6_enable_rps/vlv_enable_rps functions. But unifying things completely takes a bit more than just one patch. Do you have a proposal for an improved commit message? I kinda run low on ideas atm .. Cheers, Daniel
2013/7/10 Daniel Vetter <daniel@ffwll.ch>: > On Wed, Jul 10, 2013 at 05:05:07PM -0300, Paulo Zanoni wrote: >> 2013/7/9 Daniel Vetter <daniel.vetter@ffwll.ch>: >> > Since the addition of VECS we have a slightly different enable >> > sequence for PM interrupts on ivb/hsw vs snb and vlv. Usually that >> > will end up in hard to track down surprises. >> > >> > Hence unifiy things and since we have copies of this code in 3 places >> > now, extract it into its own little helper. >> > >> > v3: Rebase on top of the retained double-GTIIR clearing. Also >> > resurrect the masking/disabling of the gen6+ PM interrupts as spotted >> > by Ben Widaswky. >> > >> > v4: Move the DE interrupt reset code out of gen5_gt_irq_preinstall >> > back to ironlake_irq_preinstall where it really belongs. Spotted by >> > Paulo. >> > >> > Cc: Paulo Zanoni <przanoni@gmail.com> >> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> >> > --- >> > drivers/gpu/drm/i915/i915_irq.c | 39 +++++++++++++++++++++------------------ >> > 1 file changed, 21 insertions(+), 18 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c >> > index cf1a21a..d5c3bef 100644 >> > --- a/drivers/gpu/drm/i915/i915_irq.c >> > +++ b/drivers/gpu/drm/i915/i915_irq.c >> > @@ -2583,6 +2583,23 @@ static void ibx_irq_preinstall(struct drm_device *dev) >> > POSTING_READ(SDEIER); >> > } >> > >> > +static void gen5_gt_irq_preinstall(struct drm_device *dev) >> > +{ >> > + struct drm_i915_private *dev_priv = dev->dev_private; >> > + >> > + /* and GT */ >> > + I915_WRITE(GTIMR, 0xffffffff); >> > + I915_WRITE(GTIER, 0x0); >> > + POSTING_READ(GTIER); >> > + >> > + if (INTEL_INFO(dev)->gen >= 6) { >> > + /* and GT */ >> >> This comment should be /* Power management */, but it's completely >> useless, so you could kill it and also the /* and GT */ above. > > Oh, I tend to ignore old comments freely if the contradict reality. I'll > update the patch and rip the all out (there's also similarly misleading > comments in the upper-level preinstall functions). > >> > + I915_WRITE(GEN6_PMIMR, 0xffffffff); >> > + I915_WRITE(GEN6_PMIER, 0x0); >> > + POSTING_READ(GEN6_PMIER); >> > + } >> > +} >> > + >> > /* drm_dma.h hooks >> > */ >> > static void ironlake_irq_preinstall(struct drm_device *dev) >> > @@ -2593,16 +2610,11 @@ static void ironlake_irq_preinstall(struct drm_device *dev) >> > >> > I915_WRITE(HWSTAM, 0xeffe); >> > >> > - /* XXX hotplug from PCH */ >> > - >> > I915_WRITE(DEIMR, 0xffffffff); >> > I915_WRITE(DEIER, 0x0); >> > POSTING_READ(DEIER); >> > >> > - /* and GT */ >> > - I915_WRITE(GTIMR, 0xffffffff); >> > - I915_WRITE(GTIER, 0x0); >> > - POSTING_READ(GTIER); >> > + gen5_gt_irq_preinstall(dev); >> >> With this, we're now initializing GEN6_PM* on SandyBridge since it >> uses ironlake_irq_preinstall. That sounds like a good thing. We could >> either mention this in the commit message or do it in a separate >> patch. >> >> >> > >> > ibx_irq_preinstall(dev); >> > } >> > @@ -2621,15 +2633,7 @@ static void ivybridge_irq_preinstall(struct drm_device *dev) >> > I915_WRITE(DEIER, 0x0); >> > POSTING_READ(DEIER); >> > >> > - /* and GT */ >> > - I915_WRITE(GTIMR, 0xffffffff); >> > - I915_WRITE(GTIER, 0x0); >> > - POSTING_READ(GTIER); >> > - >> > - /* Power management */ >> > - I915_WRITE(GEN6_PMIMR, 0xffffffff); >> > - I915_WRITE(GEN6_PMIER, 0x0); >> > - POSTING_READ(GEN6_PMIER); >> > + gen5_gt_irq_preinstall(dev); >> > >> > ibx_irq_preinstall(dev); >> > } >> > @@ -2650,9 +2654,8 @@ static void valleyview_irq_preinstall(struct drm_device *dev) >> > /* and GT */ >> > I915_WRITE(GTIIR, I915_READ(GTIIR)); >> > I915_WRITE(GTIIR, I915_READ(GTIIR)); >> > - I915_WRITE(GTIMR, 0xffffffff); >> > - I915_WRITE(GTIER, 0x0); >> > - POSTING_READ(GTIER); >> > + >> > + gen5_gt_irq_preinstall(dev); >> >> Valleyview is Gen 7, right? So now we're also initializing GEN6_PMI* >> on it. So same comments from SNB apply here. Maybe you should change >> the commit title to "Initialize the PM interrupts on SNB and VLV". > > Hm, that's actually the change I wanted to do to. Note that on SNB/VLV we > already initialize those interrupts in the gen6_enable_rps/vlv_enable_rps > functions. But unifying things completely takes a bit more than just one > patch. > > Do you have a proposal for an improved commit message? I kinda run low on > ideas atm .. If just you read the commit message you might think that this patch only moves code around without any bug-fixing. I guess you could just say: "We're now initializing the PM interrupt registers on SNB and VLV." > > Cheers, Daniel > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index cf1a21a..d5c3bef 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2583,6 +2583,23 @@ static void ibx_irq_preinstall(struct drm_device *dev) POSTING_READ(SDEIER); } +static void gen5_gt_irq_preinstall(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + /* and GT */ + I915_WRITE(GTIMR, 0xffffffff); + I915_WRITE(GTIER, 0x0); + POSTING_READ(GTIER); + + if (INTEL_INFO(dev)->gen >= 6) { + /* and GT */ + I915_WRITE(GEN6_PMIMR, 0xffffffff); + I915_WRITE(GEN6_PMIER, 0x0); + POSTING_READ(GEN6_PMIER); + } +} + /* drm_dma.h hooks */ static void ironlake_irq_preinstall(struct drm_device *dev) @@ -2593,16 +2610,11 @@ static void ironlake_irq_preinstall(struct drm_device *dev) I915_WRITE(HWSTAM, 0xeffe); - /* XXX hotplug from PCH */ - I915_WRITE(DEIMR, 0xffffffff); I915_WRITE(DEIER, 0x0); POSTING_READ(DEIER); - /* and GT */ - I915_WRITE(GTIMR, 0xffffffff); - I915_WRITE(GTIER, 0x0); - POSTING_READ(GTIER); + gen5_gt_irq_preinstall(dev); ibx_irq_preinstall(dev); } @@ -2621,15 +2633,7 @@ static void ivybridge_irq_preinstall(struct drm_device *dev) I915_WRITE(DEIER, 0x0); POSTING_READ(DEIER); - /* and GT */ - I915_WRITE(GTIMR, 0xffffffff); - I915_WRITE(GTIER, 0x0); - POSTING_READ(GTIER); - - /* Power management */ - I915_WRITE(GEN6_PMIMR, 0xffffffff); - I915_WRITE(GEN6_PMIER, 0x0); - POSTING_READ(GEN6_PMIER); + gen5_gt_irq_preinstall(dev); ibx_irq_preinstall(dev); } @@ -2650,9 +2654,8 @@ static void valleyview_irq_preinstall(struct drm_device *dev) /* and GT */ I915_WRITE(GTIIR, I915_READ(GTIIR)); I915_WRITE(GTIIR, I915_READ(GTIIR)); - I915_WRITE(GTIMR, 0xffffffff); - I915_WRITE(GTIER, 0x0); - POSTING_READ(GTIER); + + gen5_gt_irq_preinstall(dev); I915_WRITE(DPINVGTT, 0xff);
Since the addition of VECS we have a slightly different enable sequence for PM interrupts on ivb/hsw vs snb and vlv. Usually that will end up in hard to track down surprises. Hence unifiy things and since we have copies of this code in 3 places now, extract it into its own little helper. v3: Rebase on top of the retained double-GTIIR clearing. Also resurrect the masking/disabling of the gen6+ PM interrupts as spotted by Ben Widaswky. v4: Move the DE interrupt reset code out of gen5_gt_irq_preinstall back to ironlake_irq_preinstall where it really belongs. Spotted by Paulo. Cc: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/i915_irq.c | 39 +++++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 18 deletions(-)