From patchwork Fri Jul 19 05:42:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 2830206 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 32B0E9F4D4 for ; Fri, 19 Jul 2013 05:44:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4E3E820367 for ; Fri, 19 Jul 2013 05:44:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4905E20371 for ; Fri, 19 Jul 2013 05:44:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 47191E6172 for ; Thu, 18 Jul 2013 22:44:02 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from shiva.localdomain (unknown [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id DBEAEE5CB4 for ; Thu, 18 Jul 2013 22:42:58 -0700 (PDT) Received: by shiva.localdomain (Postfix, from userid 99) id 411B2886A3; Fri, 19 Jul 2013 05:42:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from lundgren.kumite (c-24-21-100-90.hsd1.or.comcast.net [24.21.100.90]) by shiva.localdomain (Postfix) with ESMTPSA id 9FF6888168; Fri, 19 Jul 2013 05:42:54 +0000 (UTC) From: Ben Widawsky To: Intel GFX Date: Thu, 18 Jul 2013 22:42:48 -0700 Message-Id: <1374212570-7330-1-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.8.3.3 In-Reply-To: <1374018073-6596-1-git-send-email-ben@bwidawsk.net> References: <1374018073-6596-1-git-send-email-ben@bwidawsk.net> Cc: Ben Widawsky Subject: [Intel-gfx] [PATCH 1/3] drm/i915: Move error uevent to detection time X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Virus-Scanned: ClamAV using ClamSMTP We've recently deferred error handling with a workqueue for a number of reasons. However, when we're trying to pass the information to userspace, it's likely more interesting to know when the error was detected by the kernel, and not when we eventually get around to handling it in the workqueue. This was inspired as a result of the patch to move these events to the uapi. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_irq.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 9910699..9fe430a 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1435,13 +1435,10 @@ static void i915_error_work_func(struct work_struct *work) gpu_error); struct drm_device *dev = dev_priv->dev; struct intel_ring_buffer *ring; - char *error_event[] = { "ERROR=1", NULL }; char *reset_event[] = { "RESET=1", NULL }; char *reset_done_event[] = { "ERROR=0", NULL }; int i, ret; - kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event); - /* * Note that there's only one work item which does gpu resets, so we * need not worry about concurrent gpu resets potentially incrementing @@ -1594,11 +1591,14 @@ void i915_handle_error(struct drm_device *dev, bool wedged) { struct drm_i915_private *dev_priv = dev->dev_private; struct intel_ring_buffer *ring; + char *error_event[] = { "ERROR=1", NULL }; int i; i915_capture_error_state(dev); i915_report_and_clear_eir(dev); + kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event); + if (wedged) { atomic_set_mask(I915_RESET_IN_PROGRESS_FLAG, &dev_priv->gpu_error.reset_counter);