diff mbox

[01/15] drm/i915: add INTEL_IRQ_REG_RESET

Message ID 1374618835-28120-2-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni July 23, 2013, 10:33 p.m. UTC
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

The goal is to standardize the way we reset IRQ registers and also
reduce source code size. The new functions should touch IMR, IER and
IIR in the same way we're currently doing.

There are a few more cases where we could call the new functions or
set IIR to non-zero, but these represent real changes, so I'll leave
them to future patches for better bisectability.

Idea for the macro implementation shamelessly copied from Ben/Daniel.

v2: - Convert functions to macros (Ben and Daniel)
    - Don't touch i8xx code (Ben)

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 58 +++++++++++++++--------------------------
 1 file changed, 21 insertions(+), 37 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f708e4e..351e30a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -79,6 +79,15 @@  static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
 	[HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS
 };
 
+#define INTEL_IRQ_REG_RESET(type, do_iir) do { \
+	I915_WRITE(type##MR, 0xffffffff); \
+	I915_WRITE(type##ER, 0); \
+	if (do_iir) \
+		I915_WRITE(type##IR, I915_READ(type##IR)); \
+	else \
+		POSTING_READ(type##ER); \
+} while (0)
+
 /* For display hotplug interrupt */
 static void
 ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
@@ -2003,17 +2012,10 @@  static void gen5_gt_irq_preinstall(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	/* and GT */
-	I915_WRITE(GTIMR, 0xffffffff);
-	I915_WRITE(GTIER, 0x0);
-	POSTING_READ(GTIER);
+	INTEL_IRQ_REG_RESET(GTI, false);
 
-	if (INTEL_INFO(dev)->gen >= 6) {
-		/* and PM */
-		I915_WRITE(GEN6_PMIMR, 0xffffffff);
-		I915_WRITE(GEN6_PMIER, 0x0);
-		POSTING_READ(GEN6_PMIER);
-	}
+	if (INTEL_INFO(dev)->gen >= 6)
+		INTEL_IRQ_REG_RESET(GEN6_PMI, false);
 }
 
 /* drm_dma.h hooks
@@ -2026,9 +2028,7 @@  static void ironlake_irq_preinstall(struct drm_device *dev)
 
 	I915_WRITE(HWSTAM, 0xeffe);
 
-	I915_WRITE(DEIMR, 0xffffffff);
-	I915_WRITE(DEIER, 0x0);
-	POSTING_READ(DEIER);
+	INTEL_IRQ_REG_RESET(DEI, false);
 
 	gen5_gt_irq_preinstall(dev);
 
@@ -2061,9 +2061,7 @@  static void valleyview_irq_preinstall(struct drm_device *dev)
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0xffff);
 	I915_WRITE(VLV_IIR, 0xffffffff);
-	I915_WRITE(VLV_IMR, 0xffffffff);
-	I915_WRITE(VLV_IER, 0x0);
-	POSTING_READ(VLV_IER);
+	INTEL_IRQ_REG_RESET(VLV_I, false);
 }
 
 static void ibx_hpd_irq_setup(struct drm_device *dev)
@@ -2286,9 +2284,7 @@  static void valleyview_irq_uninstall(struct drm_device *dev)
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0xffff);
 	I915_WRITE(VLV_IIR, 0xffffffff);
-	I915_WRITE(VLV_IMR, 0xffffffff);
-	I915_WRITE(VLV_IER, 0x0);
-	POSTING_READ(VLV_IER);
+	INTEL_IRQ_REG_RESET(VLV_I, false);
 }
 
 static void ironlake_irq_uninstall(struct drm_device *dev)
@@ -2302,22 +2298,16 @@  static void ironlake_irq_uninstall(struct drm_device *dev)
 
 	I915_WRITE(HWSTAM, 0xffffffff);
 
-	I915_WRITE(DEIMR, 0xffffffff);
-	I915_WRITE(DEIER, 0x0);
-	I915_WRITE(DEIIR, I915_READ(DEIIR));
+	INTEL_IRQ_REG_RESET(DEI, true);
 	if (IS_GEN7(dev))
 		I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
 
-	I915_WRITE(GTIMR, 0xffffffff);
-	I915_WRITE(GTIER, 0x0);
-	I915_WRITE(GTIIR, I915_READ(GTIIR));
+	INTEL_IRQ_REG_RESET(GTI, true);
 
 	if (HAS_PCH_NOP(dev))
 		return;
 
-	I915_WRITE(SDEIMR, 0xffffffff);
-	I915_WRITE(SDEIER, 0x0);
-	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
+	INTEL_IRQ_REG_RESET(SDEI, true);
 	if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev))
 		I915_WRITE(SERR_INT, I915_READ(SERR_INT));
 }
@@ -2491,9 +2481,7 @@  static void i915_irq_preinstall(struct drm_device * dev)
 	I915_WRITE16(HWSTAM, 0xeffe);
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0);
-	I915_WRITE(IMR, 0xffffffff);
-	I915_WRITE(IER, 0x0);
-	POSTING_READ(IER);
+	INTEL_IRQ_REG_RESET(I, false);
 }
 
 static int i915_irq_postinstall(struct drm_device *dev)
@@ -2693,10 +2681,8 @@  static void i915_irq_uninstall(struct drm_device * dev)
 		I915_WRITE(PIPESTAT(pipe), 0);
 		I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));
 	}
-	I915_WRITE(IMR, 0xffffffff);
-	I915_WRITE(IER, 0x0);
 
-	I915_WRITE(IIR, I915_READ(IIR));
+	INTEL_IRQ_REG_RESET(I, true);
 }
 
 static void i965_irq_preinstall(struct drm_device * dev)
@@ -2712,9 +2698,7 @@  static void i965_irq_preinstall(struct drm_device * dev)
 	I915_WRITE(HWSTAM, 0xeffe);
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0);
-	I915_WRITE(IMR, 0xffffffff);
-	I915_WRITE(IER, 0x0);
-	POSTING_READ(IER);
+	INTEL_IRQ_REG_RESET(I, false);
 }
 
 static int i965_irq_postinstall(struct drm_device *dev)