From patchwork Fri Aug 23 13:57:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 2848841 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7FE07BF546 for ; Fri, 23 Aug 2013 13:57:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3F12220335 for ; Fri, 23 Aug 2013 13:57:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2641F20319 for ; Fri, 23 Aug 2013 13:57:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EF56CE7795 for ; Fri, 23 Aug 2013 06:57:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 37280E608F for ; Fri, 23 Aug 2013 06:57:33 -0700 (PDT) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga102.ch.intel.com with ESMTP; 23 Aug 2013 06:57:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.89,941,1367996400"; d="scan'208";a="350676638" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.86]) by azsmga001.ch.intel.com with ESMTP; 23 Aug 2013 06:57:31 -0700 Received: by rosetta (Postfix, from userid 1000) id B958D80099; Fri, 23 Aug 2013 16:57:30 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Fri, 23 Aug 2013 16:57:28 +0300 Message-Id: <1377266249-16854-1-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 1.7.9.5 Cc: miku@iki.fi Subject: [Intel-gfx] [PATCH 1/2] drm/i915: increase GPU wedging timeout X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently our wedge timeout is 5 seconds. Hangcheck needs atleast three runs to declare a hang with 1500ms timer tick period. To make sure that gpu can be wedged in the first place, define wedge timeout as multiple of hangcheck timer periods to ensure that it is always greater than hang detection time. This commit increases wedging period from 5 seconds to 8 seconds. v2: better name for macro (Chris Wilson) Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_drv.c | 3 ++- drivers/gpu/drm/i915/i915_drv.h | 3 +++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index beb2956..e19dec5 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -815,7 +815,8 @@ int i915_reset(struct drm_device *dev) simulated = dev_priv->gpu_error.stop_rings != 0; - if (!simulated && get_seconds() - dev_priv->gpu_error.last_reset < 5) { + if (!simulated && get_seconds() - dev_priv->gpu_error.last_reset < + DRM_I915_WEDGE_PERIOD) { DRM_ERROR("GPU hanging too fast, declaring wedged!\n"); ret = -ENODEV; } else { diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5f8a638..9c0ca78 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -976,6 +976,9 @@ struct i915_gpu_error { /* For hangcheck timer */ #define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */ #define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD) + /* Hangcheck needs >2 periods to declare a hang */ +#define DRM_I915_WEDGE_PERIOD DIV_ROUND_UP(5*DRM_I915_HANGCHECK_PERIOD, 1000) + struct timer_list hangcheck_timer; /* For reset and error_state handling. */