From patchwork Thu Aug 29 23:48:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lin, Mengdong" X-Patchwork-Id: 2851814 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A8DD39F88A for ; Fri, 30 Aug 2013 06:47:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6B100202FF for ; Fri, 30 Aug 2013 06:47:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id DE14E202EC for ; Fri, 30 Aug 2013 06:47:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D573E7B7E for ; Thu, 29 Aug 2013 23:47:33 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 9EE75E6661 for ; Thu, 29 Aug 2013 23:47:15 -0700 (PDT) Received: from azsmga002.ch.intel.com ([10.2.17.35]) by azsmga102.ch.intel.com with ESMTP; 29 Aug 2013 23:47:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.89,989,1367996400"; d="scan'208";a="288783639" Received: from amanda-hsw-pc.sh.intel.com ([10.239.37.28]) by AZSMGA002.ch.intel.com with ESMTP; 29 Aug 2013 23:47:12 -0700 From: mengdong.lin@intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 29 Aug 2013 19:48:17 -0400 Message-Id: <1377820097-8206-1-git-send-email-mengdong.lin@intel.com> X-Mailer: git-send-email 1.8.1.2 Cc: Mukesh Subject: [Intel-gfx] [PATCH] [VPG HSW-A] drm/i915:Added HDMI Audio codec disable sequence for HSW. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mukesh The code implements hsw_hdmi_audio_disable func which sets the relevant registers for disabling the audio codec in a call to intel_disable_ddi func.This audio codec disbale sequence is implemented as per the recommendation of the Bspec. Change-Id: If6eefbfe5ef821db547c759caa9ff5dc18980738 Signed-off-by: Mukesh Arora --- drivers/gpu/drm/i915/intel_ddi.c | 41 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 0de236e..2718d9a 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1119,6 +1119,43 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder) I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE); } +/* Sets the registers for audio codec disable sequence as +* mentioned in the Haswell Bspec. +*/ +void hsw_hdmi_audio_disable(struct drm_encoder *encoder) +{ + u32 temp; + struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct drm_device *dev = encoder->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + int aud_config = HSW_AUD_CFG(intel_crtc->pipe); + + /* HDMI audio disable sequence for Haswell*/ + if (intel_crtc->eld_vld) { + /* disable timestamps */ + temp = I915_READ(aud_config); + /* write 0 for HDMI */ + temp &= ~AUD_CONFIG_N_VALUE_INDEX; + /* Set N_programming_enable */ + temp |= AUD_CONFIG_N_PROG_ENABLE; + /* Set Upper_N_value and Lower_N_value + (bits 27:20, 15:4) to all "0"s */ + temp &= ~(AUD_CONFIG_UPPER_N_VALUE|AUD_CONFIG_LOWER_N_VALUE); + I915_WRITE(aud_config, temp); + /* Disable ELDV and ELD buffer */ + temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + temp &= ~(AUDIO_ELD_VALID_A << (intel_crtc->pipe * 4)); + I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, temp); + /* Wait for 2 vertical blanks */ + intel_wait_for_vblank(dev, intel_crtc->pipe); + intel_wait_for_vblank(dev, intel_crtc->pipe); + /* Disable audio PD. This is optional as per Bspec. */ + temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); + temp &= ~(AUDIO_OUTPUT_ENABLE_A << (intel_crtc->pipe * 4)); + I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, temp); + } + +} static void intel_enable_ddi(struct intel_encoder *intel_encoder) { struct drm_encoder *encoder = &intel_encoder->base; @@ -1173,6 +1210,10 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder) tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4)); I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp); + if (IS_HASWELL(dev) && (type == INTEL_OUTPUT_HDMI)) { + /*HDMI audio codec disable sequence. */ + hsw_hdmi_audio_disable(encoder); + } } if (type == INTEL_OUTPUT_EDP) {