From patchwork Sun Sep 1 19:51:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 2852600 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2CDA5C0AB5 for ; Sun, 1 Sep 2013 19:54:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4C6FC20256 for ; Sun, 1 Sep 2013 19:54:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6E1FE20254 for ; Sun, 1 Sep 2013 19:53:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 53684E673D for ; Sun, 1 Sep 2013 12:53:59 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B625E65B9 for ; Sun, 1 Sep 2013 12:51:29 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 01 Sep 2013 12:48:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="4.89,1002,1367996400"; d="scan'208"; a="396767943" Received: from bolo_yeung.jf.intel.com ([10.7.197.58]) by orsmga002.jf.intel.com with ESMTP; 01 Sep 2013 12:51:27 -0700 From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Sun, 1 Sep 2013 12:51:24 -0700 Message-Id: <1378065086-28705-5-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1378065086-28705-1-git-send-email-benjamin.widawsky@intel.com> References: <1378065086-28705-1-git-send-email-benjamin.widawsky@intel.com> Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 5/7] intel_gtt: Properly support gen6+ GTT PTEs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This finishes the objective in the last patch which was to actually deal with physical addresses, and not the PTEs. GEN6+ Provided support for physical addresses above 4GB. I'm not actually sure what Ironlake supported, and don't feel like firing up the timemachine. Haswell caveat is coming up next. Signed-off-by: Ben Widawsky --- tools/intel_gtt.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c index 32a6618..874a4f6 100644 --- a/tools/intel_gtt.c +++ b/tools/intel_gtt.c @@ -25,6 +25,8 @@ * */ +#define __STDC_FORMAT_MACROS +#include #include #include #include @@ -37,18 +39,26 @@ #define KB(x) ((x) * 1024) #define MB(x) ((x) * 1024 * 1024) unsigned char *gtt; +uint32_t devid; #define INGTT(offset) (*(volatile uint32_t *)(gtt + (offset) / (KB(4) / 4))) static uint64_t get_phys(uint32_t pt_offset) { - return INGTT(pt_offset); + uint64_t pae = 0; + uint64_t phys = INGTT(pt_offset); + + if (intel_gen(devid) < 6) + return phys; + + pae = (phys & 0xff0) << 28; + + return (phys | pae) & ~0xfff; } int main(int argc, char **argv) { struct pci_device *pci_dev; int start, aper_size; - uint32_t devid; int flag[] = { PCI_DEV_MAP_FLAG_WRITE_COMBINE, PCI_DEV_MAP_FLAG_WRITABLE, @@ -94,14 +104,14 @@ int main(int argc, char **argv) aper_size = pci_dev->regions[2].size; for (start = 0; start < aper_size; start += KB(4)) { - uint32_t start_phys = INGTT(start); + uint64_t start_phys = get_phys(start); uint32_t end; int constant_length = 0; int linear_length = 0; /* Check if it's a linear sequence */ for (end = start + KB(4); end < aper_size; end += KB(4)) { - uint32_t end_phys = INGTT(end); + uint64_t end_phys = get_phys(end); if (end_phys == start_phys + (end - start)) linear_length++; else @@ -109,7 +119,7 @@ int main(int argc, char **argv) } if (linear_length > 0) { printf("0x%08x - 0x%08x: linear from " - "0x%08x to 0x%08x\n", + "0x%" PRIx64 " to 0x%" PRIx64 "\n", start, end - KB(4), start_phys, start_phys + (end - start) - KB(4)); start = end - KB(4); @@ -118,20 +128,20 @@ int main(int argc, char **argv) /* Check if it's a constant sequence */ for (end = start + KB(4); end < aper_size; end += KB(4)) { - uint32_t end_phys = INGTT(end); + uint64_t end_phys = get_phys(end); if (end_phys == start_phys) constant_length++; else break; } if (constant_length > 0) { - printf("0x%08x - 0x%08x: constant 0x%08x\n", + printf("0x%08x - 0x%08x: constant 0x%" PRIx64 "\n", start, end - KB(4), start_phys); start = end - KB(4); continue; } - printf("0x%08x: 0x%08x\n", start, start_phys); + printf("0x%08x: 0x%" PRIx64 "\n", start, start_phys); } return 0;