From patchwork Wed Sep 4 11:14:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 2853607 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E0FB9C0AB5 for ; Wed, 4 Sep 2013 11:17:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5397120274 for ; Wed, 4 Sep 2013 11:17:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9A50120214 for ; Wed, 4 Sep 2013 11:17:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6924FE7003 for ; Wed, 4 Sep 2013 04:17:40 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 14A68E6FF6 for ; Wed, 4 Sep 2013 04:15:13 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 04 Sep 2013 04:15:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="4.89,1021,1367996400"; d="scan'208"; a="373298803" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.167]) by orsmga001.jf.intel.com with SMTP; 04 Sep 2013 04:15:10 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Sep 2013 14:15:10 +0300 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Sep 2013 14:14:49 +0300 Message-Id: <1378293292-30682-6-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1378293292-30682-1-git-send-email-ville.syrjala@linux.intel.com> References: <1378293292-30682-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 5/8] drm/i915: Fix port_clock readout for SDVO and HDMI 12bpc cases X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä Now that adjusted_mode.clock no longer contains the pixel_multiplier, we can kill the get_clock() callback and instead read out the DPLL stuff in get_pipe_config(). We start by filling out both adjusted_mode.clock and port_clock in i9xx_crtc_clock_get() and ironlake_crtc_clock_get(). We must keep in mind that now both clocks include pixel_multiplier on non-PCH platforms, and on PCH platforms neither clock includes pixel_multiplier. We fix that up in the encoders' get_config() functions after we've determined the actual value of pixel_multiplier. We can also use the pipe_bpp value to fix up port_clock for the 12bpc HDMI case on PCH platforms. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/intel_display.c | 32 +++++++++++++++----------------- drivers/gpu/drm/i915/intel_hdmi.c | 3 +++ drivers/gpu/drm/i915/intel_sdvo.c | 11 +++++++++++ 4 files changed, 29 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 769c138..09fc308 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -369,7 +369,6 @@ struct drm_i915_display_funcs { * fills out the pipe-config with the hw state. */ bool (*get_pipe_config)(struct intel_crtc *, struct intel_crtc_config *); - void (*get_clock)(struct intel_crtc *, struct intel_crtc_config *); int (*crtc_mode_set)(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 74affb1..8fcb8db 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5068,7 +5068,12 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc, } } - pipe_config->adjusted_mode.clock = clock.dot; + /* + * This value includes pixel_multiplier. We will fix + * adjusted_mode.clock in the encoder's get_config() + * function if necessary. + */ + pipe_config->port_clock = pipe_config->adjusted_mode.clock = clock.dot; } static bool i9xx_get_pipe_config(struct intel_crtc *crtc, @@ -5133,6 +5138,8 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, } } + i9xx_crtc_clock_get(crtc, pipe_config); + return true; } @@ -6029,7 +6036,11 @@ static void ironlake_crtc_clock_get(struct intel_crtc *crtc, clock = ((u64)link_m * (u64)link_freq); do_div(clock, link_n); - pipe_config->adjusted_mode.clock = clock; + /* + * This value does not include pixel_multiplier. We will fix + * port_clock in the encoder's get_config() function if necessary. + */ + pipe_config->port_clock = pipe_config->adjusted_mode.clock = clock; } static bool ironlake_get_pipe_config(struct intel_crtc *crtc, @@ -6102,6 +6113,8 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, ironlake_get_pfit_config(crtc, pipe_config); + ironlake_crtc_clock_get(crtc, pipe_config); + return true; } @@ -8811,9 +8824,6 @@ check_crtc_state(struct drm_device *dev) encoder->get_config(encoder, &pipe_config); } - if (dev_priv->display.get_clock) - dev_priv->display.get_clock(crtc, &pipe_config); - WARN(crtc->active != active, "crtc active state doesn't match with hw state " "(expected %i, found %i)\n", crtc->active, active); @@ -9839,7 +9849,6 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.update_plane = ironlake_update_plane; } else if (HAS_PCH_SPLIT(dev)) { dev_priv->display.get_pipe_config = ironlake_get_pipe_config; - dev_priv->display.get_clock = ironlake_crtc_clock_get; dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set; dev_priv->display.crtc_enable = ironlake_crtc_enable; dev_priv->display.crtc_disable = ironlake_crtc_disable; @@ -9847,7 +9856,6 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.update_plane = ironlake_update_plane; } else if (IS_VALLEYVIEW(dev)) { dev_priv->display.get_pipe_config = i9xx_get_pipe_config; - dev_priv->display.get_clock = i9xx_crtc_clock_get; dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set; dev_priv->display.crtc_enable = valleyview_crtc_enable; dev_priv->display.crtc_disable = i9xx_crtc_disable; @@ -9855,7 +9863,6 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.update_plane = i9xx_update_plane; } else { dev_priv->display.get_pipe_config = i9xx_get_pipe_config; - dev_priv->display.get_clock = i9xx_crtc_clock_get; dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set; dev_priv->display.crtc_enable = i9xx_crtc_enable; dev_priv->display.crtc_disable = i9xx_crtc_disable; @@ -10469,15 +10476,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) pipe); } - list_for_each_entry(crtc, &dev->mode_config.crtc_list, - base.head) { - if (!crtc->active) - continue; - if (dev_priv->display.get_clock) - dev_priv->display.get_clock(crtc, - &crtc->config); - } - list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) { if (connector->get_hw_state(connector)) { diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 4148cc8..3d833a3 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -727,6 +727,9 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder, flags |= DRM_MODE_FLAG_NVSYNC; pipe_config->adjusted_mode.flags |= flags; + + if (pipe_config->pipe_bpp == 12*3) + pipe_config->port_clock = pipe_config->adjusted_mode.clock * 3 / 2; } static void intel_enable_hdmi(struct intel_encoder *encoder) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 74042c6..4c1b9ac 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -1357,6 +1357,17 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder, >> SDVO_PORT_MULTIPLY_SHIFT) + 1; } + /* + * On PCH platforms our clock doesn't yet include the pixel + * multiplier, whereas on non-PCH platforms it already does. + */ + if (HAS_PCH_SPLIT(dev)) + pipe_config->port_clock = pipe_config->adjusted_mode.clock * + pipe_config->pixel_multiplier; + else + pipe_config->adjusted_mode.clock = pipe_config->port_clock / + pipe_config->pixel_multiplier; + /* Cross check the port pixel multiplier with the sdvo encoder state. */ if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, &val, 1)) {