From patchwork Wed Sep 4 20:55:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 2853836 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id ACD399F494 for ; Wed, 4 Sep 2013 19:54:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C117E20464 for ; Wed, 4 Sep 2013 19:54:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E606D203AC for ; Wed, 4 Sep 2013 19:54:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DC764E70F3 for ; Wed, 4 Sep 2013 12:54:43 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.bwidawsk.net (bwidawsk.net [166.78.191.112]) by gabe.freedesktop.org (Postfix) with ESMTP id 73D4BE5FB2 for ; Wed, 4 Sep 2013 12:54:06 -0700 (PDT) Received: by mail.bwidawsk.net (Postfix, from userid 5001) id 2109559BAD; Wed, 4 Sep 2013 12:54:06 -0700 (PDT) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from willis.kumite (c-24-21-100-90.hsd1.or.comcast.net [24.21.100.90]) by mail.bwidawsk.net (Postfix) with ESMTPSA id 0BD7759BA8; Wed, 4 Sep 2013 12:54:02 -0700 (PDT) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Sep 2013 13:55:20 -0700 Message-Id: <1378328120-1088-2-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1378328120-1088-1-git-send-email-benjamin.widawsky@intel.com> References: <1378328120-1088-1-git-send-email-benjamin.widawsky@intel.com> Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Fix HSW parity test X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Virus-Scanned: ClamAV using ClamSMTP Haswell changed the log registers to be WO, so we can no longer read them to determine the programming (which sucks, see later note). For now, simply use the cached value, and hope HW doesn't screw us over. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441 Signed-off-by: Ben Widawsky Tested-by: shui yangwei --- Notes: I'll be able to parity tester feature shortly, so hopefully the current gap will be filled. Also coming up will be support for the 2nd L3 slice. drivers/gpu/drm/i915/i915_sysfs.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 8feb5f0..f71efbc 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -129,6 +129,19 @@ i915_l3_read(struct file *filp, struct kobject *kobj, if (ret) return ret; + if (IS_HASWELL(drm_dev)) { + int last = min_t(int, GEN7_L3LOG_SIZE, count + offset); + if ((!dev_priv->l3_parity.remap_info)) + memset(buf + offset, 0, last - offset); + else + memcpy(buf + offset, + dev_priv->l3_parity.remap_info + (offset/4), + last - offset); + + i = last; + goto out; + } + misccpctl = I915_READ(GEN7_MISCCPCTL); I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); @@ -137,6 +150,7 @@ i915_l3_read(struct file *filp, struct kobject *kobj, I915_WRITE(GEN7_MISCCPCTL, misccpctl); +out: mutex_unlock(&drm_dev->struct_mutex); return i - offset;