From patchwork Tue Sep 24 18:26:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 2935251 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8F5119F524 for ; Tue, 24 Sep 2013 18:31:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7286E20451 for ; Tue, 24 Sep 2013 18:31:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5C35220429 for ; Tue, 24 Sep 2013 18:31:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 575C1E78B5 for ; Tue, 24 Sep 2013 11:31:40 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 4461EE7499 for ; Tue, 24 Sep 2013 11:27:17 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 24 Sep 2013 11:27:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.90,972,1371106800"; d="scan'208";a="408495236" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.167]) by orsmga002.jf.intel.com with SMTP; 24 Sep 2013 11:27:15 -0700 Received: by stinkbox (sSMTP sendmail emulation); Tue, 24 Sep 2013 21:27:14 +0300 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Tue, 24 Sep 2013 21:26:24 +0300 Message-Id: <1380047191-3359-8-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1380047191-3359-1-git-send-email-ville.syrjala@linux.intel.com> References: <1380047191-3359-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 07/14] drm/i915: Make sure we respect n.max on VLV X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-6.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä We limit the maximum n divider value in order to make sure the PLL's reference inout is at least 19.2 MHz. I assume that is done to satisfy some hardware requirement. However we never check whether that calculated limit is below the maximum supoorted N divider value (7). In practice that is always true since we only support 100 MHz reference clock, but making the code safe against higher reference clocks seems like a reasoanble thing to do. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 330fefc..333e53b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -679,13 +679,14 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, intel_clock_t *best_clock) { intel_clock_t clock; - u32 minupdate = 19200; unsigned int bestppm = 1000000; + /* min update 19.2 MHz */ + int max_n = min(limit->n.max, refclk / 19200); target *= 5; /* fast clock */ /* based on hardware requirement, prefer smaller n to precision */ - for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) { + for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) { for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0; clock.p2 -= clock.p2 > 10 ? 2 : 1) {