From patchwork Fri Sep 27 13:54:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 2955291 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DCB2EBFF0B for ; Fri, 27 Sep 2013 13:55:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2626B202C1 for ; Fri, 27 Sep 2013 13:55:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E83CD202BE for ; Fri, 27 Sep 2013 13:55:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA850E7E9A for ; Fri, 27 Sep 2013 06:55:24 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 69457E61EF for ; Fri, 27 Sep 2013 06:54:23 -0700 (PDT) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga102.ch.intel.com with ESMTP; 27 Sep 2013 06:54:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.90,993,1371106800"; d="scan'208";a="366450370" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.167]) by azsmga001.ch.intel.com with SMTP; 27 Sep 2013 06:54:20 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 27 Sep 2013 16:54:19 +0300 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Sep 2013 16:54:19 +0300 Message-Id: <1380290059-14574-1-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <874n96cwcr.fsf@gaia.fi.intel.com> References: <874n96cwcr.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 05/14] drm/i915: Rewrite vlv_find_best_dpll() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä Rewrite vlv_find_best_dpll() to use intel_clock_t rather than an army of local variables. Also extract the code to calculate the derived values into vlv_clock(). v2: Split up the earlier fixes, extract vlv_clock() v3: Initialize best_clock Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 74 ++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 41 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f646fea..9faf3bb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -438,6 +438,14 @@ static void i9xx_clock(int refclk, intel_clock_t *clock) clock->dot = clock->vco / clock->p; } +static void vlv_clock(int refclk, intel_clock_t *clock) +{ + clock->m = clock->m1 * clock->m2; + clock->p = clock->p1 * clock->p2; + clock->vco = refclk * clock->m / clock->n; + clock->dot = clock->vco / clock->p; +} + /** * Returns whether any output on the specified pipe is of the specified type */ @@ -670,66 +678,50 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, int target, int refclk, intel_clock_t *match_clock, intel_clock_t *best_clock) { - u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2; - u32 m, n, fastclk; - u32 updrate, minupdate, p; + intel_clock_t clock; + u32 minupdate = 19200; unsigned int bestppm = 1000000; - int dotclk, flag; - flag = 0; - dotclk = target * 1000; - fastclk = dotclk / (2*100); - updrate = 0; - minupdate = 19200; - n = p = p1 = p2 = m = m1 = m2 = vco = bestn = 0; - bestm1 = bestm2 = bestp1 = bestp2 = 0; + target *= 5; /* fast clock */ + + memset(best_clock, 0, sizeof(*best_clock)); /* based on hardware requirement, prefer smaller n to precision */ - for (n = limit->n.min; n <= ((refclk) / minupdate); n++) { - updrate = refclk / n; - for (p1 = limit->p1.max; p1 > limit->p1.min; p1--) { - for (p2 = limit->p2.p2_fast+1; p2 > 0; p2--) { - if (p2 > 10) - p2 = p2 - 1; - p = p1 * p2; + for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) { + for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) { + for (clock.p2 = limit->p2.p2_fast+1; clock.p2 > 0; clock.p2--) { + if (clock.p2 > 10) + clock.p2--; + clock.p = clock.p1 * clock.p2; /* based on hardware requirement, prefer bigger m1,m2 values */ - for (m1 = limit->m1.min; m1 <= limit->m1.max; m1++) { + for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) { unsigned int ppm, diff; - m2 = DIV_ROUND_CLOSEST(fastclk * p * n, refclk * m1); - m = m1 * m2; - vco = updrate * m; + clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n, + refclk * clock.m1); + + vlv_clock(refclk, &clock); - if (vco < limit->vco.min || vco >= limit->vco.max) + if (clock.vco < limit->vco.min || + clock.vco >= limit->vco.max) continue; - diff = abs(vco / p - fastclk); - ppm = div_u64(1000000ULL * diff, fastclk); - if (ppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) { + diff = abs(clock.dot - target); + ppm = div_u64(1000000ULL * diff, target); + + if (ppm < 100 && clock.p > best_clock->p) { bestppm = 0; - flag = 1; + *best_clock = clock; } + if (bestppm >= 10 && ppm < bestppm - 10) { bestppm = ppm; - flag = 1; - } - if (flag) { - bestn = n; - bestm1 = m1; - bestm2 = m2; - bestp1 = p1; - bestp2 = p2; - flag = 0; + *best_clock = clock; } } } } } - best_clock->n = bestn; - best_clock->m1 = bestm1; - best_clock->m2 = bestm2; - best_clock->p1 = bestp1; - best_clock->p2 = bestp2; return true; }