From patchwork Mon Oct 14 23:07:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 3040991 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9A98DBF924 for ; Mon, 14 Oct 2013 23:29:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A4B9C20200 for ; Mon, 14 Oct 2013 23:29:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C5A49201FD for ; Mon, 14 Oct 2013 23:29:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CE5BE6889 for ; Mon, 14 Oct 2013 16:29:49 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from outbound-ss-509.bluehost.com (outbound-ss-509.bluehost.com [67.222.47.146]) by gabe.freedesktop.org (Postfix) with SMTP id 48462E701B for ; Mon, 14 Oct 2013 16:07:55 -0700 (PDT) Received: (qmail 22068 invoked by uid 0); 14 Oct 2013 23:07:54 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy12.mail.unifiedlayer.com with SMTP; 14 Oct 2013 23:07:54 -0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=rHPv/Z8kObeWRiiV3c843kkL+E2ssTZsMbA+6BFqWlA=; b=C8iGUFimJdQAksrNLlMAnLSGVFQsRXfBhXNqDIxvqu/FgYfC6m2Ct40OTCGgPpkuK4wJC8OuM+lTgUH1KK5VLJuY0F/pLX/pqc1e2xJO5bH050DICakm81GlWt83Tw7N; Received: from [67.161.37.189] (port=56824 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1:CAMELLIA256-SHA:256) (Exim 4.80) (envelope-from ) id 1VVrEw-0000hc-Ki for intel-gfx@lists.freedesktop.org; Mon, 14 Oct 2013 17:07:54 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2013 16:07:48 -0700 Message-Id: <1381792069-27800-5-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1381792069-27800-1-git-send-email-jbarnes@virtuousgeek.org> References: <1381792069-27800-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 4/5] drm/i915: take power well refs when needed X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When accessing the display regs for hw state readout or cross check, we need to make sure the power well is enabled so we can read valid register state. Likewise, in an actual mode set, we need to take a ref on the appropriate power well so that the mode set succeeds. From then on, the power well ref will be tracked by the CRTC enable/disable code. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c | 2 ++ drivers/gpu/drm/i915/intel_display.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 313a8c9..91c3e6c 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1367,6 +1367,8 @@ static int i915_load_modeset_init(struct drm_device *dev) i915_disable_vga_mem(dev); intel_display_power_put(dev, POWER_DOMAIN_VGA); + intel_display_power_put(dev, POWER_DOMAIN_PIPE(0)); + /* Only enable hotplug handling once the fbdev is fully set up. */ dev_priv->enable_hotplug_processing = true; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6e4729b..62ee110 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3841,6 +3841,8 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) if (intel_crtc->active) return; + intel_display_power_get(dev, POWER_DOMAIN_PIPE(pipe)); + intel_crtc->active = true; for_each_encoder_on_crtc(dev, crtc, encoder) @@ -3975,6 +3977,9 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) intel_update_watermarks(crtc); intel_update_fbc(dev); + + if (IS_VALLEYVIEW(dev)) + intel_display_power_put(dev, POWER_DOMAIN_PIPE(pipe)); } static void i9xx_crtc_off(struct drm_crtc *crtc) @@ -4134,6 +4139,11 @@ static void intel_connector_check_state(struct intel_connector *connector) * consider. */ void intel_connector_dpms(struct drm_connector *connector, int mode) { + struct intel_crtc *intel_crtc = to_intel_crtc(connector->encoder->crtc); + enum intel_display_power_domain domain; + + domain = POWER_DOMAIN_PIPE(intel_crtc->pipe); + /* All the simple cases only support two dpms states. */ if (mode != DRM_MODE_DPMS_ON) mode = DRM_MODE_DPMS_OFF; @@ -4141,6 +4151,7 @@ void intel_connector_dpms(struct drm_connector *connector, int mode) if (mode == connector->dpms) return; + intel_display_power_get(connector->dev, domain); connector->dpms = mode; /* Only need to change hw state when actually enabled */ @@ -4148,6 +4159,7 @@ void intel_connector_dpms(struct drm_connector *connector, int mode) intel_encoder_dpms(to_intel_encoder(connector->encoder), mode); intel_modeset_check_state(connector->dev); + intel_display_power_put(connector->dev, domain); } /* Simple connector->get_hw_state implementation for encoders that support only @@ -9192,6 +9204,15 @@ static int __intel_set_mode(struct drm_crtc *crtc, for_each_intel_crtc_masked(dev, disable_pipes, intel_crtc) intel_crtc_disable(&intel_crtc->base); + /* + * We take a ref here so the mode set will hit live hw. Once + * we call the CRTC enable, we can drop our ref since it'll get + * tracked there from then on. + */ + for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) + intel_display_power_get(dev, + POWER_DOMAIN_PIPE(intel_crtc->pipe)); + for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) { if (intel_crtc->base.enabled) dev_priv->display.crtc_disable(&intel_crtc->base); @@ -9247,6 +9268,10 @@ done: } out: + for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) + intel_display_power_put(dev, + POWER_DOMAIN_PIPE(intel_crtc->pipe)); + kfree(pipe_config); kfree(saved_mode); return ret; @@ -10692,6 +10717,11 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) crtc->base.enabled = crtc->active; + if (crtc->active) + intel_display_power_get(dev, + POWER_DOMAIN_PIPE(crtc->pipe)); + + DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n", crtc->base.base.id, crtc->active ? "enabled" : "disabled");