| Message ID | 1381848067-5269-2-git-send-email-rodrigo.vivi@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index aa983f3..7213ea8 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -670,6 +670,9 @@ struct drm_i915_gem_execbuffer2 { /** Resets the SO write offset registers for transform feedback on gen7. */ #define I915_EXEC_GEN7_SOL_RESET (1<<8) +/* Use all available GT Slisces */ +#define I915_EXEC_GT_FULL (1<<13) + #define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) #define i915_execbuffer2_set_context_id(eb2, context) \ (eb2).rsvd1 = context & I915_EXEC_CONTEXT_ID_MASK
Rendering buffers that need full GT power can request full power through this I915_EXEC_GT_FULL flag. If the default is the power saving with half slices off it executes LRIs to immediately enable all slices. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> --- include/drm/i915_drm.h | 3 +++ 1 file changed, 3 insertions(+)