Message ID | 1382341927-19401-2-git-send-email-jani.nikula@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Mon, Oct 21, 2013 at 10:52:07AM +0300, Jani Nikula wrote: > This isn't a real fix to the problem, but rather a stopgap measure while > trying to find a proper solution. > > There are several laptops out there that fail to light up the eDP panel > in UEFI boot mode. They seem to be mostly IVB machines, including but > apparently not limited to Dell XPS 13, Asus TX300, Asus UX31A, Asus > UX32VD, Acer Aspire S7. They seem to work in CSM or legacy boot. > > The difference between UEFI and CSM is that the BIOS provides a > different VBT to the kernel. The UEFI VBT typically specifies 18 bpp and > 1.62 GHz link for eDP, while CSM VBT has 24 bpp and 2.7 GHz link. We end > up clamping to 18 bpp in UEFI mode, which we can fit in the 1.62 Ghz > link, and for reasons yet unknown fail to light up the panel. > > Dithering from 24 to 18 bpp itself seems to work; if we use 18 bpp with > 2.7 GHz link, the eDP panel lights up. So essentially this is a link > speed issue, and *not* a bpp clamping issue. > > The bug raised its head since > commit 657445fe8660100ad174600ebfa61536392b7624 > Author: Daniel Vetter <daniel.vetter@ffwll.ch> > Date: Sat May 4 10:09:18 2013 +0200 > > Revert "drm/i915: revert eDP bpp clamping code changes" > > which started clamping bpp *before* computing the link requirements, and > thus affecting the required bandwidth. Clamping after the computations > kept the link at 2.7 GHz. > > Even though the BIOS tells us to use 18 bpp through the VBT, it happily > boots up at 24 bpp and 2.7 GHz itself! Use this information to > selectively ignore the VBT provided value. > > We can't ignore the VBT eDP bpp altogether, as there are other laptops > that do require the clamping to be used due to EDID reporting higher bpp > than the panel can support. > > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=59841 > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67950 > Tested-by: Ulf Winkelvos <ulf@winkelvos.de> > Tested-by: jkp <jkp@iki.fi> > CC: stable@vger.kernel.org > Signed-off-by: Jani Nikula <jani.nikula@intel.com> Both merged to -fixes, thanks for the quick backport. I've added the note about we need the first patch to the commit message and also added the cc: stable tag. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 2c555f9..1a43137 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1401,6 +1401,26 @@ static void intel_dp_get_config(struct intel_encoder *encoder, else pipe_config->port_clock = 270000; } + + if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp && + pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) { + /* + * This is a big fat ugly hack. + * + * Some machines in UEFI boot mode provide us a VBT that has 18 + * bpp and 1.62 GHz link bandwidth for eDP, which for reasons + * unknown we fail to light up. Yet the same BIOS boots up with + * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as + * max, not what it tells us to use. + * + * Note: This will still be broken if the eDP panel is not lit + * up by the BIOS, and thus we can't get the mode at module + * load. + */ + DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n", + pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp); + dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp; + } } static bool is_edp_psr(struct intel_dp *intel_dp)