From patchwork Mon Oct 21 12:21:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Shobhit" X-Patchwork-Id: 3077161 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 099D39F372 for ; Mon, 21 Oct 2013 12:15:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CC01020426 for ; Mon, 21 Oct 2013 12:15:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2220B203F4 for ; Mon, 21 Oct 2013 12:14:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 22B1FE6A96 for ; Mon, 21 Oct 2013 05:14:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 7FE0EE6A7A for ; Mon, 21 Oct 2013 05:14:08 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by azsmga101.ch.intel.com with ESMTP; 21 Oct 2013 05:14:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.93,539,1378882800"; d="scan'208";a="414466180" Received: from skumar40-desk.iind.intel.com ([10.223.25.115]) by fmsmga001.fm.intel.com with ESMTP; 21 Oct 2013 05:13:38 -0700 From: Shobhit Kumar To: intel-gfx Date: Mon, 21 Oct 2013 17:51:04 +0530 Message-Id: <1382358067-5578-2-git-send-email-shobhit.kumar@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1382358067-5578-1-git-send-email-shobhit.kumar@intel.com> References: <1382358067-5578-1-git-send-email-shobhit.kumar@intel.com> Cc: jani.nikula@intel.com, vijayakumar.balakrishnan@intel.com, yogesh.mohan.marimuthu@intel.com Subject: [Intel-gfx] [PATCH 1/4] drm/i915: Add more dev ops for MIPI sub encoder X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Also add new fields in intel_dsi to have all dphy related parameters. These will be useful even when we go for pure generic MIPI design Yogesh Mohan Marimuthu Signed-off-by: Shobhit Kumar --- drivers/gpu/drm/i915/intel_dsi.c | 9 ++++++++- drivers/gpu/drm/i915/intel_dsi.h | 29 +++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 9a2fdd2..34e19b7 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -147,6 +147,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder) DRM_DEBUG_KMS("\n"); + if (intel_dsi->dev.dev_ops->panel_reset) + intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev); + temp = I915_READ(MIPI_DEVICE_READY(pipe)); if ((temp & DEVICE_READY) == 0) { temp &= ~ULPS_STATE_MASK; @@ -162,6 +165,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder) I915_WRITE(MIPI_DEVICE_READY(pipe), temp); } + if (intel_dsi->dev.dev_ops->send_otp_cmds) + intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev); + if (is_cmd_mode(intel_dsi)) I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(pipe), 8 * 4); @@ -176,7 +182,8 @@ static void intel_dsi_enable(struct intel_encoder *encoder) POSTING_READ(MIPI_PORT_CTRL(pipe)); } - intel_dsi->dev.dev_ops->enable(&intel_dsi->dev); + if (intel_dsi->dev.dev_ops->enable) + intel_dsi->dev.dev_ops->enable(&intel_dsi->dev); } static void intel_dsi_disable(struct intel_encoder *encoder) diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index c7765f3..b71c9b3 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -39,6 +39,13 @@ struct intel_dsi_device { struct intel_dsi_dev_ops { bool (*init)(struct intel_dsi_device *dsi); + void (*panel_reset)(struct intel_dsi_device *dsi); + + void (*disable_panel_power)(struct intel_dsi_device *dsi); + + /* send one time programmable commands */ + void (*send_otp_cmds)(struct intel_dsi_device *dsi); + /* This callback must be able to assume DSI commands can be sent */ void (*enable)(struct intel_dsi_device *dsi); @@ -89,6 +96,28 @@ struct intel_dsi { /* eot for MIPI_EOT_DISABLE register */ u32 eot_disable; + + u16 dsi_clock_freq; + u8 video_mode_type; + u32 data_width; + u8 dither; + u32 port_bits; + u8 escape_clk_div; + u32 lp_rx_timeout; + u8 turn_arnd_val; + u16 init_count; + u16 rst_timer_val; + u16 hs_to_lp_count; + u16 lp_byte_clk; + u32 bw_timer; + u16 clk_lp_to_hs_count; + u16 clk_hs_to_lp_count; + u32 video_frmt_cfg_bits; + u32 dphy_reg; + + u8 backlight_off_delay; /*in ms*/ + bool send_shutdown; + u8 shutdown_pkt_delay; /*in ms*/ }; static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)