From patchwork Thu Oct 31 14:44:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3120721 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id ADE9E9F3E2 for ; Thu, 31 Oct 2013 14:44:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 23EE120453 for ; Thu, 31 Oct 2013 14:44:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B320D203DB for ; Thu, 31 Oct 2013 14:44:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B89FFEE0E7; Thu, 31 Oct 2013 07:44:43 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-vb0-f44.google.com (mail-vb0-f44.google.com [209.85.212.44]) by gabe.freedesktop.org (Postfix) with ESMTP id 10103EE0E7 for ; Thu, 31 Oct 2013 07:44:41 -0700 (PDT) Received: by mail-vb0-f44.google.com with SMTP id 11so2002624vbe.3 for ; Thu, 31 Oct 2013 07:44:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aC46hjYJkKCxtAflC9FE9Ywxok9KqprBl0CYdwQX4DE=; b=Ex4tBIFEm2vwt2N3EonYmxPQ8KvFdjFsVX30dKqOIVI8XNeRP3pDuMZbTlM6Kbl43z wEIBEWJCX4flvkzt0a0mNCKQ98/HbV8OxPfUfEsD1ZckxKWVQRSrIgGPOapZa/CA9+66 045rLhgQySZKwgoqyvachrioNJ3OYpAP7p6iBSTtZfUix4tRlWn8zVaJv6A16tvYNj9F GwWl+iqHxkXYtQvGeuhv/8KZiv5MPg6cqOZfQsedFU9eml0TwLw9h0Aa58W7WYJ9RjMQ hvC9lyOMNxpXDxZywg4MFzg+korYHu7PY4tvV+EM+uyK1HG8p0A/PWh2z11VgRdHcCgd 9lIw== X-Received: by 10.220.145.75 with SMTP id c11mr2264809vcv.30.1383230681391; Thu, 31 Oct 2013 07:44:41 -0700 (PDT) Received: from localhost.localdomain ([177.133.211.156]) by mx.google.com with ESMTPSA id gr8sm4233202vdc.10.2013.10.31.07.44.37 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 31 Oct 2013 07:44:40 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Thu, 31 Oct 2013 12:44:21 -0200 Message-Id: <1383230661-1819-1-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH] drm/i915: use the correct register when turning VDD off X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni That explains why I was seeing 2 consecutive "Turning eDP VDD off" messages. Regression introduced by: commit bf13e81b904a37d94d83dd6c3b53a147719a3ead Author: Jani Nikula Date: Fri Sep 6 07:40:05 2013 +0300 drm/i915: add support for per-pipe power sequencing on vlv Signed-off-by: Paulo Zanoni Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 8db1fda..c8515bb 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1125,8 +1125,8 @@ static void ironlake_panel_vdd_off_sync(struct intel_dp *intel_dp) pp = ironlake_get_pp_control(intel_dp); pp &= ~EDP_FORCE_VDD; - pp_stat_reg = _pp_ctrl_reg(intel_dp); - pp_ctrl_reg = _pp_stat_reg(intel_dp); + pp_ctrl_reg = _pp_ctrl_reg(intel_dp); + pp_stat_reg = _pp_stat_reg(intel_dp); I915_WRITE(pp_ctrl_reg, pp); POSTING_READ(pp_ctrl_reg);