From patchwork Sun Nov 3 04:07:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 3132281 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8296DBEEB2 for ; Sun, 3 Nov 2013 04:10:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ACC3A20340 for ; Sun, 3 Nov 2013 04:10:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CF19B202E5 for ; Sun, 3 Nov 2013 04:10:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5848FF0D2B for ; Sat, 2 Nov 2013 21:09:33 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id ECE8FEDEEB for ; Sat, 2 Nov 2013 21:08:13 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 02 Nov 2013 21:08:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.93,535,1378882800"; d="scan'208";a="402748250" Received: from unknown (HELO lundgren.intel.com) ([10.255.15.29]) by orsmga001.jf.intel.com with ESMTP; 02 Nov 2013 21:08:12 -0700 From: Ben Widawsky To: Intel GFX Date: Sat, 2 Nov 2013 21:07:20 -0700 Message-Id: <1383451680-11173-23-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1383451680-11173-1-git-send-email-benjamin.widawsky@intel.com> References: <1383451680-11173-1-git-send-email-benjamin.widawsky@intel.com> MIME-Version: 1.0 Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 22/62] drm/i915/bdw: Implement Full Force Miss disables X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Implements WaVSRefCountFullforceMissDisable Implements WaDSRefCountFullforceMissDisable v2: Rebased on the HSW patch (which fixed the bug from v1) commit 41c0b3a88c7bae96d8e2ee60c7ed91f57fd152d7 Author: Ben Widawsky Date: Sat Jan 26 11:52:00 2013 -0800 drm/i915: Implement WaVSRefCountFullforceMissDisable Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9929750..68b877d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -990,6 +990,7 @@ #define GEN7_FF_THREAD_MODE 0x20a0 #define GEN7_FF_SCHED_MASK 0x0077070 +#define GEN7_FF_DS_REF_CNT_FFME (1 << 19) #define GEN7_FF_TS_SCHED_HS1 (0x5<<16) #define GEN7_FF_TS_SCHED_HS0 (0x3<<16) #define GEN7_FF_TS_SCHED_LOAD_BALANCE (0x1<<16) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index abc51ea..81ec2c3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5147,6 +5147,10 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) if (IS_HASWELL(dev_priv->dev)) reg &= ~GEN7_FF_VS_REF_CNT_FFME; + /* WaVSRefCountFullforceMissDisable|WaDSRefCountFullforceMissDisable */ + if (IS_GEN8(dev_priv->dev)) + reg &= ~(GEN7_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME); + I915_WRITE(GEN7_FF_THREAD_MODE, reg); }