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[04/62] drm/i915/bdw: Add device IDs

Message ID 1383451680-11173-5-git-send-email-benjamin.widawsky@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ben Widawsky Nov. 3, 2013, 4:07 a.m. UTC
v2: Squash in "drm/i915/bdw: Add BDW to the HAS_DDI check" as
suggested by Damien.

v3: Squash in VEBOX enabling from  Zhao Yakui <yakui.zhao@intel.com>

v4: Rebase on top of Jesse's patch to extract all pci ids to
include/drm/i915_pciids.h.

v4: Replace Halo by its marketing moniker Iris. Requested by Ben.

v5: Switch from info->has*ring to info->ring_mask.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_drv.c | 22 +++++++++++++++++++++-
 include/drm/i915_pciids.h       | 27 +++++++++++++++++++++++++++
 2 files changed, 48 insertions(+), 1 deletion(-)

Comments

Chris Wilson Nov. 3, 2013, 9:58 p.m. UTC | #1
On Sat, Nov 02, 2013 at 09:07:02PM -0700, Ben Widawsky wrote:
> @@ -367,7 +385,9 @@ static const struct intel_device_info intel_haswell_m_info = {
>  	INTEL_HSW_D_IDS(&intel_haswell_d_info), \
>  	INTEL_HSW_M_IDS(&intel_haswell_m_info), \
>  	INTEL_VLV_M_IDS(&intel_valleyview_m_info),	\
> -	INTEL_VLV_D_IDS(&intel_valleyview_d_info)
> +	INTEL_VLV_D_IDS(&intel_valleyview_d_info),	\
> +	INTEL_BDW_PCI_IDS_M(&intel_broadwell_m_info),	\
> +	INTEL_BDW_PCI_IDS_D(&intel_broadwell_d_info)

Inconsistent naming scheme post Jesse-rebase.
  
>  static const struct pci_device_id pciidlist[] = {		/* aka */
>  	INTEL_PCI_IDS,
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 8a10f5c..d35bc0b 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -208,4 +208,31 @@
>  #define INTEL_VLV_D_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0155, info)
>  
> +#define _INTEL_BDW_PCI_ID_M(gt, id, info) \
> +	INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
> +#define _INTEL_BDW_PCI_ID_D(gt, id, info) \
> +	INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
> +
> +#define INTEL_BDW_PCI_ID_M(gt, info) \
> +	_INTEL_BDW_PCI_ID_M(gt, 0x1606, info), /* ULT */ \
> +	_INTEL_BDW_PCI_ID_M(gt, 0x160B, info), /* Iris */ \
> +	_INTEL_BDW_PCI_ID_M(gt, 0x160E, info) /* ULX */
> +
> +#define INTEL_BDW_PCI_ID_D(gt, info) \
> +	_INTEL_BDW_PCI_ID_M(gt, 0x160A, info), /* Server */ \
> +	_INTEL_BDW_PCI_ID_M(gt, 0x160D, info) /* Workstation */
> +
> +#define INTEL_BDW_PCI_IDS_M(info) \
> +	INTEL_BDW_PCI_ID_M(1, info), \
> +	INTEL_BDW_PCI_ID_M(2, info), \
> +	INTEL_BDW_PCI_ID_M(3, info), \
> +	INTEL_VGA_DEVICE(0x0BD0, info) /* Simulator GT1 */
> +
> +#define INTEL_BDW_PCI_IDS_D(info) \
> +	INTEL_BDW_PCI_ID_D(1, info), \
> +	INTEL_BDW_PCI_ID_D(2, info), \
> +	INTEL_BDW_PCI_ID_D(3, info), \
> +	INTEL_VGA_DEVICE(0x0BD1, info), /* Simulator GT2 */ \
> +	INTEL_VGA_DEVICE(0x0BD2, info)  /*/Simulator GT3 */

I thought we weren't adding internal simulator ids upstream?
-Chris
Ben Widawsky Nov. 4, 2013, 12:43 a.m. UTC | #2
On Sun, Nov 03, 2013 at 09:58:00PM +0000, Chris Wilson wrote:
> On Sat, Nov 02, 2013 at 09:07:02PM -0700, Ben Widawsky wrote:
> > @@ -367,7 +385,9 @@ static const struct intel_device_info intel_haswell_m_info = {
> >  	INTEL_HSW_D_IDS(&intel_haswell_d_info), \
> >  	INTEL_HSW_M_IDS(&intel_haswell_m_info), \
> >  	INTEL_VLV_M_IDS(&intel_valleyview_m_info),	\
> > -	INTEL_VLV_D_IDS(&intel_valleyview_d_info)
> > +	INTEL_VLV_D_IDS(&intel_valleyview_d_info),	\
> > +	INTEL_BDW_PCI_IDS_M(&intel_broadwell_m_info),	\
> > +	INTEL_BDW_PCI_IDS_D(&intel_broadwell_d_info)
> 
> Inconsistent naming scheme post Jesse-rebase.
>   
> >  static const struct pci_device_id pciidlist[] = {		/* aka */
> >  	INTEL_PCI_IDS,
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> > index 8a10f5c..d35bc0b 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -208,4 +208,31 @@
> >  #define INTEL_VLV_D_IDS(info) \
> >  	INTEL_VGA_DEVICE(0x0155, info)
> >  
> > +#define _INTEL_BDW_PCI_ID_M(gt, id, info) \
> > +	INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
> > +#define _INTEL_BDW_PCI_ID_D(gt, id, info) \
> > +	INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
> > +
> > +#define INTEL_BDW_PCI_ID_M(gt, info) \
> > +	_INTEL_BDW_PCI_ID_M(gt, 0x1606, info), /* ULT */ \
> > +	_INTEL_BDW_PCI_ID_M(gt, 0x160B, info), /* Iris */ \
> > +	_INTEL_BDW_PCI_ID_M(gt, 0x160E, info) /* ULX */
> > +
> > +#define INTEL_BDW_PCI_ID_D(gt, info) \
> > +	_INTEL_BDW_PCI_ID_M(gt, 0x160A, info), /* Server */ \
> > +	_INTEL_BDW_PCI_ID_M(gt, 0x160D, info) /* Workstation */

Tsk tsk - you missed this one.

> > +
> > +#define INTEL_BDW_PCI_IDS_M(info) \
> > +	INTEL_BDW_PCI_ID_M(1, info), \
> > +	INTEL_BDW_PCI_ID_M(2, info), \
> > +	INTEL_BDW_PCI_ID_M(3, info), \
> > +	INTEL_VGA_DEVICE(0x0BD0, info) /* Simulator GT1 */
> > +
> > +#define INTEL_BDW_PCI_IDS_D(info) \
> > +	INTEL_BDW_PCI_ID_D(1, info), \
> > +	INTEL_BDW_PCI_ID_D(2, info), \
> > +	INTEL_BDW_PCI_ID_D(3, info), \
> > +	INTEL_VGA_DEVICE(0x0BD1, info), /* Simulator GT2 */ \
> > +	INTEL_VGA_DEVICE(0x0BD2, info)  /*/Simulator GT3 */
> 
> I thought we weren't adding internal simulator ids upstream?
> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 770c9f8..1ff169e 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -336,6 +336,24 @@  static const struct intel_device_info intel_haswell_m_info = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 };
 
+static const struct intel_device_info intel_broadwell_d_info = {
+	.is_preliminary = 1,
+	.gen = 8,
+	.need_gfx_hws = 1, .has_hotplug = 1,
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
+	.has_llc = 1,
+	.has_ddi = 1,
+};
+
+static const struct intel_device_info intel_broadwell_m_info = {
+	.is_preliminary = 1,
+	.gen = 8, .is_mobile = 1,
+	.need_gfx_hws = 1, .has_hotplug = 1,
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
+	.has_llc = 1,
+	.has_ddi = 1,
+};
+
 /*
  * Make sure any device matches here are from most specific to most
  * general.  For example, since the Quanta match is based on the subsystem
@@ -367,7 +385,9 @@  static const struct intel_device_info intel_haswell_m_info = {
 	INTEL_HSW_D_IDS(&intel_haswell_d_info), \
 	INTEL_HSW_M_IDS(&intel_haswell_m_info), \
 	INTEL_VLV_M_IDS(&intel_valleyview_m_info),	\
-	INTEL_VLV_D_IDS(&intel_valleyview_d_info)
+	INTEL_VLV_D_IDS(&intel_valleyview_d_info),	\
+	INTEL_BDW_PCI_IDS_M(&intel_broadwell_m_info),	\
+	INTEL_BDW_PCI_IDS_D(&intel_broadwell_d_info)
 
 static const struct pci_device_id pciidlist[] = {		/* aka */
 	INTEL_PCI_IDS,
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 8a10f5c..d35bc0b 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -208,4 +208,31 @@ 
 #define INTEL_VLV_D_IDS(info) \
 	INTEL_VGA_DEVICE(0x0155, info)
 
+#define _INTEL_BDW_PCI_ID_M(gt, id, info) \
+	INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
+#define _INTEL_BDW_PCI_ID_D(gt, id, info) \
+	INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
+
+#define INTEL_BDW_PCI_ID_M(gt, info) \
+	_INTEL_BDW_PCI_ID_M(gt, 0x1606, info), /* ULT */ \
+	_INTEL_BDW_PCI_ID_M(gt, 0x160B, info), /* Iris */ \
+	_INTEL_BDW_PCI_ID_M(gt, 0x160E, info) /* ULX */
+
+#define INTEL_BDW_PCI_ID_D(gt, info) \
+	_INTEL_BDW_PCI_ID_M(gt, 0x160A, info), /* Server */ \
+	_INTEL_BDW_PCI_ID_M(gt, 0x160D, info) /* Workstation */
+
+#define INTEL_BDW_PCI_IDS_M(info) \
+	INTEL_BDW_PCI_ID_M(1, info), \
+	INTEL_BDW_PCI_ID_M(2, info), \
+	INTEL_BDW_PCI_ID_M(3, info), \
+	INTEL_VGA_DEVICE(0x0BD0, info) /* Simulator GT1 */
+
+#define INTEL_BDW_PCI_IDS_D(info) \
+	INTEL_BDW_PCI_ID_D(1, info), \
+	INTEL_BDW_PCI_ID_D(2, info), \
+	INTEL_BDW_PCI_ID_D(3, info), \
+	INTEL_VGA_DEVICE(0x0BD1, info), /* Simulator GT2 */ \
+	INTEL_VGA_DEVICE(0x0BD2, info)  /*/Simulator GT3 */
+
 #endif /* _I915_PCIIDS_H */