| Message ID | 1384434652-3206-1-git-send-email-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2013/11/14 Imre Deak <imre.deak@intel.com>: > Signed-off-by: Imre Deak <imre.deak@intel.com> Since I assume all power wells will require some kind of register-checking and hardware-touching at the init paths, shouldn't we add power_well->init_hw() and call it once for each power well? The problem with this series is that we're doing code changes for a case we still didn't try to implement (multiple power wells), so sometimes it gets hard to predict what exactly will be needed/used. > --- > drivers/gpu/drm/i915/intel_pm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index ee5aeb1..d5eacd8 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5912,6 +5912,9 @@ void intel_power_domains_init_hw(struct drm_device *dev) > intel_display_set_init_power(dev, true); > intel_power_domains_resume(dev); > > + if (!(IS_HASWELL(dev) || IS_BROADWELL(dev))) > + return; > + > /* We're taking over the BIOS, so clear any requests made by it since > * the driver is in charge now. */ > if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE_REQUEST) > -- > 1.8.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Fri, 2013-11-22 at 14:09 -0200, Paulo Zanoni wrote: > 2013/11/14 Imre Deak <imre.deak@intel.com>: > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > Since I assume all power wells will require some kind of > register-checking and hardware-touching at the init paths, shouldn't > we add power_well->init_hw() and call it once for each power well? So far HSW/BDW is the only instance that I know of, so we'd end up having empty stubs for the rest. > The problem with this series is that we're doing code changes for a case > we still didn't try to implement (multiple power wells), so sometimes > it gets hard to predict what exactly will be needed/used. Yea, I realize this is somewhat of a problem. This a preparation for future stuff, for which I do have an implementation only in my local tree.. But I tried to make clarifications in the logs to this effect. --Imre > > --- > > drivers/gpu/drm/i915/intel_pm.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index ee5aeb1..d5eacd8 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -5912,6 +5912,9 @@ void intel_power_domains_init_hw(struct drm_device *dev) > > intel_display_set_init_power(dev, true); > > intel_power_domains_resume(dev); > > > > + if (!(IS_HASWELL(dev) || IS_BROADWELL(dev))) > > + return; > > + > > /* We're taking over the BIOS, so clear any requests made by it since > > * the driver is in charge now. */ > > if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE_REQUEST) > > -- > > 1.8.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ee5aeb1..d5eacd8 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5912,6 +5912,9 @@ void intel_power_domains_init_hw(struct drm_device *dev) intel_display_set_init_power(dev, true); intel_power_domains_resume(dev); + if (!(IS_HASWELL(dev) || IS_BROADWELL(dev))) + return; + /* We're taking over the BIOS, so clear any requests made by it since * the driver is in charge now. */ if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE_REQUEST)
Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 3 +++ 1 file changed, 3 insertions(+)