From patchwork Thu Nov 14 13:11:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 3182501 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8598FC045B for ; Thu, 14 Nov 2013 13:11:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 367A720984 for ; Thu, 14 Nov 2013 13:11:23 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F08C320983 for ; Thu, 14 Nov 2013 13:11:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AEBBA1058B5; Thu, 14 Nov 2013 05:11:19 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 931061058AC for ; Thu, 14 Nov 2013 05:11:07 -0800 (PST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 14 Nov 2013 05:11:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.93,535,1378882800"; d="scan'208";a="408745789" Received: from intelbox.fi.intel.com (HELO localhost) ([10.237.72.105]) by orsmga001.jf.intel.com with ESMTP; 14 Nov 2013 05:11:06 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Thu, 14 Nov 2013 15:11:05 +0200 Message-Id: <1384434665-3296-1-git-send-email-imre.deak@intel.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1383326394-3933-1-git-send-email-imre.deak@intel.com> References: <1383326394-3933-1-git-send-email-imre.deak@intel.com> Subject: [Intel-gfx] [PATCH v2 8/8] drm/i915: add a debugfs entry for power domain info X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a debugfs entry showing the use-count for all power domains of each power well. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/i915_debugfs.c | 69 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 4 +++ drivers/gpu/drm/i915/intel_pm.c | 16 ++++++--- 3 files changed, 85 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 6875b7a..a6555cd 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1844,6 +1844,74 @@ static int i915_pc8_status(struct seq_file *m, void *unused) return 0; } +static const char *power_domain_str(enum intel_display_power_domain domain) +{ +#define PWRD(p) { POWER_DOMAIN_ ## p, # p } + static struct { + enum intel_display_power_domain domain; + const char *name; + } table[] = { + PWRD(PIPE_A), + PWRD(PIPE_B), + PWRD(PIPE_C), + PWRD(PIPE_A_PANEL_FITTER), + PWRD(PIPE_B_PANEL_FITTER), + PWRD(PIPE_C_PANEL_FITTER), + PWRD(TRANSCODER_A), + PWRD(TRANSCODER_B), + PWRD(TRANSCODER_C), + PWRD(TRANSCODER_EDP), + PWRD(VGA), + PWRD(AUDIO), + PWRD(INIT), + }; +#undef PWRD + int i; + + for (i = 0; i < ARRAY_SIZE(table); i++) + if (table[i].domain == domain) + return table[i].name; + + WARN_ON(1); + + return "?"; +} + +static int i915_power_domain_info(struct seq_file *m, void *unused) +{ + struct drm_info_node *node = (struct drm_info_node *) m->private; + struct drm_device *dev = node->minor->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct i915_power_domains *power_domains = &dev_priv->power_domains; + int i; + + mutex_lock(&power_domains->lock); + + seq_printf(m, "%-25s %s\n", "Power well/domain", "Use count"); + for (i = 0; i < power_domains->power_well_count; i++) { + struct i915_power_well *power_well; + enum intel_display_power_domain power_domain; + + power_well = &power_domains->power_wells[i]; + seq_printf(m, "%-25s %d\n", power_well->name, + power_well->count); + + for (power_domain = 0; power_domain < POWER_DOMAIN_NUM; + power_domain++) { + if (!(BIT(power_domain) & power_well->domains)) + continue; + + seq_printf(m, " %-23s %d\n", + power_domain_str(power_domain), + power_well->domain_count[power_domain]); + } + } + + mutex_unlock(&power_domains->lock); + + return 0; +} + struct pipe_crc_info { const char *name; struct drm_device *dev; @@ -3076,6 +3144,7 @@ static const struct drm_info_list i915_debugfs_list[] = { {"i915_edp_psr_status", i915_edp_psr_status, 0}, {"i915_energy_uJ", i915_energy_uJ, 0}, {"i915_pc8_status", i915_pc8_status, 0}, + {"i915_power_domain_info", i915_power_domain_info, 0}, }; #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 06f47bf..194e39f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -950,6 +950,10 @@ struct i915_power_well { /* power well enable/disable usage count */ int count; unsigned long domains; +#if IS_ENABLED(CONFIG_DEBUG_FS) + /* usage count for each power domain in the domains mask */ + int domain_count[POWER_DOMAIN_NUM]; +#endif void *data; void (*set)(struct drm_device *dev, struct i915_power_well *power_well, bool enable); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d252453..99210c1 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5726,17 +5726,25 @@ static void hsw_set_power_well(struct drm_device *dev, } static void __intel_power_well_get(struct drm_device *dev, - struct i915_power_well *power_well) + struct i915_power_well *power_well, + enum intel_display_power_domain domain) { +#if IS_ENABLED(CONFIG_DEBUG_FS) + power_well->domain_count[domain]++; +#endif if (!power_well->count++ && power_well->set) power_well->set(dev, power_well, true); } static void __intel_power_well_put(struct drm_device *dev, - struct i915_power_well *power_well) + struct i915_power_well *power_well, + enum intel_display_power_domain domain) { WARN_ON(!power_well->count); +#if IS_ENABLED(CONFIG_DEBUG_FS) + power_well->domain_count[domain]--; +#endif if (!--power_well->count && power_well->set && i915_disable_power_well) power_well->set(dev, power_well, false); } @@ -5753,7 +5761,7 @@ void intel_display_power_get(struct drm_device *dev, mutex_lock(&power_domains->lock); for_each_power_well(i, power_well, BIT(domain), power_domains) - __intel_power_well_get(dev, power_well); + __intel_power_well_get(dev, power_well, domain); mutex_unlock(&power_domains->lock); } @@ -5769,7 +5777,7 @@ void intel_display_power_put(struct drm_device *dev, mutex_lock(&power_domains->lock); for_each_power_well_rev(i, power_well, BIT(domain), power_domains) - __intel_power_well_put(dev, power_well); + __intel_power_well_put(dev, power_well, domain); mutex_unlock(&power_domains->lock); }