diff mbox

[10/19] drm/i915: do not assert DE_PCH_EVENT_IVB enabled

Message ID 1385048853-1579-11-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni Nov. 21, 2013, 3:47 p.m. UTC 
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

The current code was checking if all bits of "val" were enabled and
DE_PCH_EVENT_IVB was disabled. The new code doesn't care about the
state of DE_PCH_EVENT_IVB: it just checks if everything else is 1.

The goal is that future patches may completely disable interrupts, and
the LCPLL-disabling code shouldn't care about the state of
DE_PCH_EVENT_IVB.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Rodrigo Vivi Nov. 29, 2013, 2:30 p.m. UTC | #1 
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Thu, Nov 21, 2013 at 01:47:24PM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> The current code was checking if all bits of "val" were enabled and
> DE_PCH_EVENT_IVB was disabled. The new code doesn't care about the
> state of DE_PCH_EVENT_IVB: it just checks if everything else is 1.
> 
> The goal is that future patches may completely disable interrupts, and
> the LCPLL-disabling code shouldn't care about the state of
> DE_PCH_EVENT_IVB.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 846f2de..95e8831 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6499,7 +6499,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
>  
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	val = I915_READ(DEIMR);
> -	WARN((val & ~DE_PCH_EVENT_IVB) != val,
> +	WARN((val | DE_PCH_EVENT_IVB) != 0xffffffff,
>  	     "Unexpected DEIMR bits enabled: 0x%x\n", val);
>  	val = I915_READ(SDEIMR);
>  	WARN((val | SDE_HOTPLUG_MASK_CPT) != 0xffffffff,
> -- 
> 1.8.3.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter Dec. 10, 2013, 9:54 p.m. UTC | #2 
On Thu, Nov 21, 2013 at 01:47:24PM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> The current code was checking if all bits of "val" were enabled and
> DE_PCH_EVENT_IVB was disabled. The new code doesn't care about the
> state of DE_PCH_EVENT_IVB: it just checks if everything else is 1.
> 
> The goal is that future patches may completely disable interrupts, and
> the LCPLL-disabling code shouldn't care about the state of
> DE_PCH_EVENT_IVB.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 846f2de..95e8831 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6499,7 +6499,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
>  
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	val = I915_READ(DEIMR);
> -	WARN((val & ~DE_PCH_EVENT_IVB) != val,
> +	WARN((val | DE_PCH_EVENT_IVB) != 0xffffffff,

I think the old test doesn't really do what your commit message claims it
does, but the new one seems correct. So merged.
-Daniel

>  	     "Unexpected DEIMR bits enabled: 0x%x\n", val);
>  	val = I915_READ(SDEIMR);
>  	WARN((val | SDE_HOTPLUG_MASK_CPT) != 0xffffffff,
> -- 
> 1.8.3.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 846f2de..95e8831 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6499,7 +6499,7 @@  static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 
 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
 	val = I915_READ(DEIMR);
-	WARN((val & ~DE_PCH_EVENT_IVB) != val,
+	WARN((val | DE_PCH_EVENT_IVB) != 0xffffffff,
 	     "Unexpected DEIMR bits enabled: 0x%x\n", val);
 	val = I915_READ(SDEIMR);
 	WARN((val | SDE_HOTPLUG_MASK_CPT) != 0xffffffff,