| Message ID | 1385048853-1579-13-git-send-email-przanoni@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Nov 21, 2013 at 01:47:26PM -0200, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > So we'll get a fault when someone tries to access the mmap, then we'll > wake up from D3. Harsh. Very harsh. Is the GTT completely off-limits under pc8, or is it only the GTT access to the display engine? i.e. could we get away with only killing some of the mmaps? -Chris
2013/11/21 Chris Wilson <chris@chris-wilson.co.uk>: > On Thu, Nov 21, 2013 at 01:47:26PM -0200, Paulo Zanoni wrote: >> From: Paulo Zanoni <paulo.r.zanoni@intel.com> >> >> So we'll get a fault when someone tries to access the mmap, then we'll >> wake up from D3. > > Harsh. Very harsh. Is the GTT completely off-limits under pc8 Under D3, not PC8. > , or is it > only the GTT access to the display engine? i.e. could we get away with > only killing some of the mmaps? I don't have any documentation describing what should work and what shouldn't: all I know comes from our test suite, function gem_mmap_subtest: http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/tree/tests/pm_pc8.c#n927 . On that test, we don't use the buffers on the display engine. We just do gem_create(), then gem_mmap__gtt(), write values to the buff, put the device in D3, then try to read the buffer contents and see if it is what we wrote. So I imagine the answer to your question is probably "no". If you have more ideas of tests I could write that would help answering your questions, please tell me:) > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre
On Thu, Nov 21, 2013 at 01:47:26PM -0200, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > So we'll get a fault when someone tries to access the mmap, then we'll > wake up from D3. > > This fixes the gem-mmap-gtt subtest from pm_pc8 from intel-gpu-tools. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 2 ++ > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_gem.c | 8 ++++++++ > 3 files changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index b133836..6510483 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -912,6 +912,8 @@ static int i915_runtime_suspend(struct device *device) > > DRM_DEBUG_KMS("Suspending device\n"); > > + i915_gem_release_all_mmaps(dev_priv); > + > dev_priv->pm.suspended = true; > > intel_opregion_notify_adapter(dev, PCI_D3cold); > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 3877a68..3702746 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2003,6 +2003,7 @@ void i915_gem_object_unpin(struct drm_i915_gem_object *obj); > int __must_check i915_vma_unbind(struct i915_vma *vma); > int __must_check i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj); > int i915_gem_object_put_pages(struct drm_i915_gem_object *obj); > +void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv); > void i915_gem_release_mmap(struct drm_i915_gem_object *obj); > void i915_gem_lastclose(struct drm_device *dev); > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 94c2a38..68fa7c7 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -1465,6 +1465,14 @@ out: > return ret; > } > > +void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv) > +{ > + struct drm_i915_gem_object *obj; > + > + list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) This should use the global gtt lrus to avoid walking all bound objects - if there's no ggtt mapping the object also can't be bound. Only downside is that we need to walk two lists (active+inactive) but that split should get removed eventually anyway. -Daniel > + i915_gem_release_mmap(obj); > +} > + > /** > * i915_gem_release_mmap - remove physical page mappings > * @obj: obj in question > -- > 1.8.3.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index b133836..6510483 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -912,6 +912,8 @@ static int i915_runtime_suspend(struct device *device) DRM_DEBUG_KMS("Suspending device\n"); + i915_gem_release_all_mmaps(dev_priv); + dev_priv->pm.suspended = true; intel_opregion_notify_adapter(dev, PCI_D3cold); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3877a68..3702746 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2003,6 +2003,7 @@ void i915_gem_object_unpin(struct drm_i915_gem_object *obj); int __must_check i915_vma_unbind(struct i915_vma *vma); int __must_check i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj); int i915_gem_object_put_pages(struct drm_i915_gem_object *obj); +void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv); void i915_gem_release_mmap(struct drm_i915_gem_object *obj); void i915_gem_lastclose(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 94c2a38..68fa7c7 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1465,6 +1465,14 @@ out: return ret; } +void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv) +{ + struct drm_i915_gem_object *obj; + + list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) + i915_gem_release_mmap(obj); +} + /** * i915_gem_release_mmap - remove physical page mappings * @obj: obj in question