diff mbox

[06/19] drm/i915: do adapter power state notification at runtime PM

Message ID 1385048853-1579-7-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni Nov. 21, 2013, 3:47 p.m. UTC 
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

Now that we are actually setting the device to the D3 state, we should
issue the notification.

Jani originally wrote a similar patch for PC8, but then we discovered
that we were not really changing the PCI D states when
enabling/disabling PC8, so we had to postpone his patch.

Cc: Jani Nikula <jani.nikula@intel.com>
Credits-to: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Chris Wilson Nov. 21, 2013, 4:14 p.m. UTC | #1 
On Thu, Nov 21, 2013 at 01:47:20PM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> Now that we are actually setting the device to the D3 state, we should
> issue the notification.

Can you please add a snippet to justify the ordering? Is there anything
to say what state the callee expects the device to be in when we send
the notificiation?
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d7ff095..b133836 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -914,6 +914,7 @@  static int i915_runtime_suspend(struct device *device)
 
 	dev_priv->pm.suspended = true;
 
+	intel_opregion_notify_adapter(dev, PCI_D3cold);
 	pci_save_state(pdev);
 	pci_set_power_state(pdev, PCI_D3cold);
 
@@ -932,6 +933,7 @@  static int i915_runtime_resume(struct device *device)
 
 	pci_set_power_state(pdev, PCI_D0);
 	pci_restore_state(pdev);
+	intel_opregion_notify_adapter(dev, PCI_D0);
 
 	dev_priv->pm.suspended = false;