From patchwork Wed Dec 4 01:27:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 3280411 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9DD069F377 for ; Wed, 4 Dec 2013 01:27:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B7F9420439 for ; Wed, 4 Dec 2013 01:27:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8E5AF2042B for ; Wed, 4 Dec 2013 01:27:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C8EEFB991; Tue, 3 Dec 2013 17:27:38 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 4D6A6FB991 for ; Tue, 3 Dec 2013 17:27:36 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 03 Dec 2013 17:27:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.93,821,1378882800"; d="scan'208";a="446392595" Received: from ironside.jf.intel.com ([10.7.197.60]) by orsmga002.jf.intel.com with ESMTP; 03 Dec 2013 17:27:35 -0800 From: Ben Widawsky To: Intel GFX Date: Tue, 3 Dec 2013 17:27:35 -0800 Message-Id: <1386120455-19606-1-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1386110615-10061-1-git-send-email-benjamin.widawsky@intel.com> References: <1386110615-10061-1-git-send-email-benjamin.widawsky@intel.com> Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH v2] drm/i915: Propagate errors on failed PPGTT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Clean up the return values/error handling so it's obvious what is going on. This was tripped over in the PPGTT branch where code was added to do a ret = foo() near the top, and this ended up bypassing some error cases later. These errors shouldn't exist with today's code, but a future patch will add a ret = ..., and this the value of ret needs to be set explicitly. v2: Missed an error in alloc_page for gen6 Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index e63ae52..866b23e 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -361,7 +361,7 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm) static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size) { struct page *pt_pages; - int i, j, ret = -ENOMEM; + int i, j, ret; const int max_pdp = DIV_ROUND_UP(size, 1 << 30); const int num_pt_pages = GEN8_PDES_PER_PAGE * max_pdp; @@ -407,14 +407,17 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size) temp = pci_map_page(ppgtt->base.dev->pdev, &ppgtt->pd_pages[i], 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); - if (pci_dma_mapping_error(ppgtt->base.dev->pdev, temp)) + ret = pci_dma_mapping_error(ppgtt->base.dev->pdev, temp); + if (ret) goto err_out; ppgtt->pd_dma_addr[i] = temp; ppgtt->gen8_pt_dma_addr[i] = kmalloc(sizeof(dma_addr_t) * GEN8_PDES_PER_PAGE, GFP_KERNEL); - if (!ppgtt->gen8_pt_dma_addr[i]) + if (!ppgtt->gen8_pt_dma_addr[i]) { + ret = -ENOMEM; goto err_out; + } for (j = 0; j < GEN8_PDES_PER_PAGE; j++) { struct page *p = &pt_pages[i * GEN8_PDES_PER_PAGE + j]; @@ -422,7 +425,8 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size) p, 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); - if (pci_dma_mapping_error(ppgtt->base.dev->pdev, temp)) + ret = pci_dma_mapping_error(ppgtt->base.dev->pdev, temp); + if (ret) goto err_out; ppgtt->gen8_pt_dma_addr[i][j] = temp; @@ -849,7 +853,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt) struct drm_device *dev = ppgtt->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; bool retried = false; - int i, ret = -ENOMEM; + int i, ret; /* PPGTT PDEs reside in the GGTT and consists of 512 entries. The * allocator works in address space sizes, so it's multiplied by page @@ -904,14 +908,18 @@ alloc: for (i = 0; i < ppgtt->num_pd_entries; i++) { ppgtt->pt_pages[i] = alloc_page(GFP_KERNEL); - if (!ppgtt->pt_pages[i]) + if (!ppgtt->pt_pages[i]) { + ret = -ENOMEM; goto err_pt_alloc; + } } ppgtt->pt_dma_addr = kcalloc(ppgtt->num_pd_entries, sizeof(dma_addr_t), GFP_KERNEL); - if (!ppgtt->pt_dma_addr) + if (!ppgtt->pt_dma_addr) { + ret = -ENOMEM; goto err_pt_alloc; + } for (i = 0; i < ppgtt->num_pd_entries; i++) { dma_addr_t pt_addr;