From patchwork Fri Dec 6 22:29:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3301981 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 22C9BC0D4A for ; Fri, 6 Dec 2013 22:29:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 545F020396 for ; Fri, 6 Dec 2013 22:29:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 462B6203E6 for ; Fri, 6 Dec 2013 22:29:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2A8D6FB112; Fri, 6 Dec 2013 14:29:11 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yh0-f53.google.com (mail-yh0-f53.google.com [209.85.213.53]) by gabe.freedesktop.org (Postfix) with ESMTP id D8FCEFB112 for ; Fri, 6 Dec 2013 14:29:08 -0800 (PST) Received: by mail-yh0-f53.google.com with SMTP id b20so1002099yha.12 for ; Fri, 06 Dec 2013 14:29:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2HqFVbIQGl1yRvuU0tA70kNGEatEthdmg3fgWqHwvC0=; b=RHX+kObsb+HcqqVSr8MLT9hm755m4Hbe6kocsRrJt1RvpgNWmrA0GoV8bq4klh97cN 1ygoEm23fV/VuqAJhsBDbrgtJ9RL/YxAaRPz7GOFGIj8ZN8I5v5GZqBsk9bHuGPC54iO 3A+jK2PSE/yeFgisaT3kZbY44oT6GTJyw6J4G9i4nkfhH9MmL0pNs1x8AfcZjhEt+dh1 PqPVFsEFmZVz4KOWY5gEIcmhNX3dA3wpz4eFGDjGxO/F/7BnDYQRcv31WchmcE74wdJn LImEsbvtjAebkhtStK0NoJOyIkoHZubLF8JtRR4h+diuwC02x0PoJy9m24TxSWfugbCw vMuw== X-Received: by 10.236.143.10 with SMTP id k10mr4665280yhj.116.1386368948345; Fri, 06 Dec 2013 14:29:08 -0800 (PST) Received: from localhost.localdomain ([177.132.151.173]) by mx.google.com with ESMTPSA id c44sm68135146yho.20.2013.12.06.14.29.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Dec 2013 14:29:07 -0800 (PST) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Fri, 6 Dec 2013 20:29:01 -0200 Message-Id: <1386368941-2262-1-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH] drm/i915: change CRTC assertion on LCPLL disable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni Currently, PC8 is enabled at modeset_global_resources, which is called after intel_modeset_update_state. Due to this, there's a small race condition on the case where we start enabling PC8, then do a modeset while PC8 is still being enabled. The racing condition triggers a WARN because intel_modeset_update_state will mark the CRTC as enabled, then the thread that's still enabling PC8 might look at the data structure and think that PC8 is being enabled while a pipe is enabled. Despite the WARN, this is not really a bug since we'll wait for the PC8-enabling thread to finish when we call modeset_global_resources. The spec says the CRTC cannot be enabled when we disable LCPLL, so we had a check for crtc->base.enabled. If we change to crtc->active we will still prevent disabling LCPLL while the CRTC is enabled, and we will also prevent the WARN above. This is a replacement for the previous patch named "drm/i915: get/put PC8 when we get/put a CRTC" Testcase: igt/pm_pc8/modeset-lpsp-stress-no-wait Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6d9e183..3934b5f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6490,7 +6490,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) uint32_t val; list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) - WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n", + WARN(crtc->active, "CRTC for pipe %c enabled\n", pipe_name(crtc->pipe)); WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n");