diff mbox

drm/i915: Move VLV PHY CRI clock enable into intel_init_dpio()

Message ID 1386677205-7316-1-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä Dec. 10, 2013, 12:06 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The CRI clock is related to the display PHY, so the setup belongs
in intel_init_dpio().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

Comments

Jesse Barnes Dec. 10, 2013, 6:52 p.m. UTC | #1
On Tue, 10 Dec 2013 14:06:45 +0200
ville.syrjala@linux.intel.com wrote:

> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The CRI clock is related to the display PHY, so the setup belongs
> in intel_init_dpio().
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index af3717a..e3ca21f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1367,6 +1367,10 @@ static void intel_init_dpio(struct drm_device *dev)
>  	if (!IS_VALLEYVIEW(dev))
>  		return;
>  
> +	/* Enable the CRI clock source so we can get at the display */
> +	I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
> +		   DPLL_INTEGRATED_CRI_CLK_VLV);
> +
>  	DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO;
>  	/*
>  	 * From VLV2A0_DP_eDP_DPIO_driver_vbios_notes_10.docx -
> @@ -10788,17 +10792,10 @@ static void i915_disable_vga(struct drm_device *dev)
>  
>  void intel_modeset_init_hw(struct drm_device *dev)
>  {
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -
>  	intel_prepare_ddi(dev);
>  
>  	intel_init_clock_gating(dev);
>  
> -	/* Enable the CRI clock source so we can get at the display */
> -	if (IS_VALLEYVIEW(dev))
> -		I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
> -			   DPLL_INTEGRATED_CRI_CLK_VLV);
> -
>  	intel_init_dpio(dev);
>  
>  	mutex_lock(&dev->struct_mutex);

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Daniel Vetter Dec. 10, 2013, 7:05 p.m. UTC | #2
On Tue, Dec 10, 2013 at 10:52:54AM -0800, Jesse Barnes wrote:
> On Tue, 10 Dec 2013 14:06:45 +0200
> ville.syrjala@linux.intel.com wrote:
> 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The CRI clock is related to the display PHY, so the setup belongs
> > in intel_init_dpio().
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 11 ++++-------
> >  1 file changed, 4 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index af3717a..e3ca21f 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -1367,6 +1367,10 @@ static void intel_init_dpio(struct drm_device *dev)
> >  	if (!IS_VALLEYVIEW(dev))
> >  		return;
> >  
> > +	/* Enable the CRI clock source so we can get at the display */
> > +	I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
> > +		   DPLL_INTEGRATED_CRI_CLK_VLV);
> > +
> >  	DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO;
> >  	/*
> >  	 * From VLV2A0_DP_eDP_DPIO_driver_vbios_notes_10.docx -
> > @@ -10788,17 +10792,10 @@ static void i915_disable_vga(struct drm_device *dev)
> >  
> >  void intel_modeset_init_hw(struct drm_device *dev)
> >  {
> > -	struct drm_i915_private *dev_priv = dev->dev_private;
> > -
> >  	intel_prepare_ddi(dev);
> >  
> >  	intel_init_clock_gating(dev);
> >  
> > -	/* Enable the CRI clock source so we can get at the display */
> > -	if (IS_VALLEYVIEW(dev))
> > -		I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
> > -			   DPLL_INTEGRATED_CRI_CLK_VLV);
> > -
> >  	intel_init_dpio(dev);
> >  
> >  	mutex_lock(&dev->struct_mutex);
> 
> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Queued for -next, thanks for the patch.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index af3717a..e3ca21f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1367,6 +1367,10 @@  static void intel_init_dpio(struct drm_device *dev)
 	if (!IS_VALLEYVIEW(dev))
 		return;
 
+	/* Enable the CRI clock source so we can get at the display */
+	I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
+		   DPLL_INTEGRATED_CRI_CLK_VLV);
+
 	DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO;
 	/*
 	 * From VLV2A0_DP_eDP_DPIO_driver_vbios_notes_10.docx -
@@ -10788,17 +10792,10 @@  static void i915_disable_vga(struct drm_device *dev)
 
 void intel_modeset_init_hw(struct drm_device *dev)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
-
 	intel_prepare_ddi(dev);
 
 	intel_init_clock_gating(dev);
 
-	/* Enable the CRI clock source so we can get at the display */
-	if (IS_VALLEYVIEW(dev))
-		I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
-			   DPLL_INTEGRATED_CRI_CLK_VLV);
-
 	intel_init_dpio(dev);
 
 	mutex_lock(&dev->struct_mutex);