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[2/3] drm/i915: don't wait for vblank after enabling pipe on HSW

Message ID 1387487551-1612-2-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni Dec. 19, 2013, 9:12 p.m. UTC
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

Because on Haswell, the pipe is never running at this point, so we hit
the 50ms timeout waiting for nothing. We already have two other places
where we wait for vblanks on haswell_crtc_enable, so we're safe.

This gets us rid of one instance of "vblank wait timed out" for each
mode set, which means driver init and resume are also 50ms faster.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jesse Barnes Jan. 15, 2014, 6:26 p.m. UTC | #1
On Thu, 19 Dec 2013 19:12:30 -0200
Paulo Zanoni <przanoni@gmail.com> wrote:

> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> Because on Haswell, the pipe is never running at this point, so we hit
> the 50ms timeout waiting for nothing. We already have two other places
> where we wait for vblanks on haswell_crtc_enable, so we're safe.
> 
> This gets us rid of one instance of "vblank wait timed out" for each
> mode set, which means driver init and resume are also 50ms faster.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6865fa2..f0f78d3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3706,7 +3706,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
>  
>  	intel_update_watermarks(crtc);
>  	intel_enable_pipe(dev_priv, pipe,
> -			  intel_crtc->config.has_pch_encoder, false, true);
> +			  intel_crtc->config.has_pch_encoder, false, false);
>  
>  	if (intel_crtc->config.has_pch_encoder)
>  		lpt_pch_enable(crtc);

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6865fa2..f0f78d3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3706,7 +3706,7 @@  static void haswell_crtc_enable(struct drm_crtc *crtc)
 
 	intel_update_watermarks(crtc);
 	intel_enable_pipe(dev_priv, pipe,
-			  intel_crtc->config.has_pch_encoder, false, true);
+			  intel_crtc->config.has_pch_encoder, false, false);
 
 	if (intel_crtc->config.has_pch_encoder)
 		lpt_pch_enable(crtc);