diff mbox

drm/i915/bdw: don't try to check IPS state on BDW

Message ID 1389054481-4111-1-git-send-email-jbarnes@virtuousgeek.org (mailing list archive)
State New, archived
Headers show

Commit Message

Jesse Barnes Jan. 7, 2014, 12:28 a.m. UTC
According to Art, we don't have a way to read back the state reliably at
runtime, at least not without risking disabling it again.  So drop the
readout and checking on BDW.

References: https://bugs.freedesktop.org/show_bug.cgi?id=71906
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

Comments

Paulo Zanoni Jan. 7, 2014, 7:49 p.m. UTC | #1
2014/1/6 Jesse Barnes <jbarnes@virtuousgeek.org>:
> According to Art, we don't have a way to read back the state reliably at
> runtime, at least not without risking disabling it again.  So drop the
> readout and checking on BDW.

Based on that, we also need to:
- Replace the TODO comment at hsw_enable_ips() with something else
- Move the POSTING_READ() at hsw_disable_ips() to the IS_HASWELL() case
- Print "enisabled" when someone reads i915_ips_status on BDW


>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=71906
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 4d1357a..b6dfae6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -7004,8 +7004,9 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>         if (intel_display_power_enabled(dev, pfit_domain))
>                 ironlake_get_pfit_config(crtc, pipe_config);
>
> -       pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
> -                                  (I915_READ(IPS_CTL) & IPS_ENABLE);
> +       if (IS_HASWELL(dev))
> +               pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
> +                       (I915_READ(IPS_CTL) & IPS_ENABLE);
>
>         pipe_config->pixel_multiplier = 1;
>
> @@ -9335,7 +9336,9 @@ intel_pipe_config_compare(struct drm_device *dev,
>                 PIPE_CONF_CHECK_I(pch_pfit.size);
>         }
>
> -       PIPE_CONF_CHECK_I(ips_enabled);
> +       /* BDW+ don't expose a synchronous way to read the state */
> +       if (IS_HASWELL(dev))
> +               PIPE_CONF_CHECK_I(ips_enabled);
>
>         PIPE_CONF_CHECK_I(double_wide);
>
> --
> 1.8.3.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Jesse Barnes Jan. 7, 2014, 9:33 p.m. UTC | #2
On Tue, 7 Jan 2014 17:49:05 -0200
Paulo Zanoni <przanoni@gmail.com> wrote:

> 2014/1/6 Jesse Barnes <jbarnes@virtuousgeek.org>:
> > According to Art, we don't have a way to read back the state reliably at
> > runtime, at least not without risking disabling it again.  So drop the
> > readout and checking on BDW.
> 
> Based on that, we also need to:
> - Replace the TODO comment at hsw_enable_ips() with something else
> - Move the POSTING_READ() at hsw_disable_ips() to the IS_HASWELL() case
> - Print "enisabled" when someone reads i915_ips_status on BDW

All good changes.  Just sent an updated patch.

Thanks,
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4d1357a..b6dfae6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7004,8 +7004,9 @@  static bool haswell_get_pipe_config(struct intel_crtc *crtc,
 	if (intel_display_power_enabled(dev, pfit_domain))
 		ironlake_get_pfit_config(crtc, pipe_config);
 
-	pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
-				   (I915_READ(IPS_CTL) & IPS_ENABLE);
+	if (IS_HASWELL(dev))
+		pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
+			(I915_READ(IPS_CTL) & IPS_ENABLE);
 
 	pipe_config->pixel_multiplier = 1;
 
@@ -9335,7 +9336,9 @@  intel_pipe_config_compare(struct drm_device *dev,
 		PIPE_CONF_CHECK_I(pch_pfit.size);
 	}
 
-	PIPE_CONF_CHECK_I(ips_enabled);
+	/* BDW+ don't expose a synchronous way to read the state */
+	if (IS_HASWELL(dev))
+		PIPE_CONF_CHECK_I(ips_enabled);
 
 	PIPE_CONF_CHECK_I(double_wide);