diff mbox

[16/28] drm/i915: WaApplyL3ControlAndL3ChickenMode isn't applicable for VLV

Message ID 1390419184-4450-17-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä Jan. 22, 2014, 7:32 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in
W/A database and BSpec.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 2 --
 1 file changed, 2 deletions(-)

Comments

Rodrigo Vivi Jan. 24, 2014, 11:18 a.m. UTC | #1 
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Wed, Jan 22, 2014 at 5:32 PM,  <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in
> W/A database and BSpec.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 895046f..62d339b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4930,8 +4930,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
>
>         /* WaDisableL3CacheAging:vlv */
>         I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
> -       /* WaApplyL3ControlAndL3ChickenMode:vlv */
> -       I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);
>
>         /* WaForceL3Serialization:vlv */
>         I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
> --
> 1.8.3.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter Jan. 28, 2014, 1:24 p.m. UTC | #2 
On Wed, Jan 22, 2014 at 09:32:52PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in
> W/A database and BSpec.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 895046f..62d339b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4930,8 +4930,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
>  
>  	/* WaDisableL3CacheAging:vlv */
>  	I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
> -	/* WaApplyL3ControlAndL3ChickenMode:vlv */
> -	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);

This one doesn't seem to be here ... is some earlier patch which I haven't
merged yet adding this? Can't we just fold this in?
-Daniel

>  
>  	/* WaForceL3Serialization:vlv */
>  	I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
> -- 
> 1.8.3.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ville Syrjälä Jan. 28, 2014, 2:13 p.m. UTC | #3 
On Tue, Jan 28, 2014 at 02:24:42PM +0100, Daniel Vetter wrote:
> On Wed, Jan 22, 2014 at 09:32:52PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in
> > W/A database and BSpec.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 2 --
> >  1 file changed, 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 895046f..62d339b 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4930,8 +4930,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
> >  
> >  	/* WaDisableL3CacheAging:vlv */
> >  	I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
> > -	/* WaApplyL3ControlAndL3ChickenMode:vlv */
> > -	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);
> 
> This one doesn't seem to be here ... is some earlier patch which I haven't
> merged yet adding this? Can't we just fold this in?

? I see you alreay applied this patch. Are ou trying to put it in twice?
IIRC in the past we applied one workaround three times, now we're trying
to not apply one twice :)

> -Daniel
> 
> >  
> >  	/* WaForceL3Serialization:vlv */
> >  	I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
> > -- 
> > 1.8.3.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
Daniel Vetter Jan. 28, 2014, 3:32 p.m. UTC | #4 
On Tue, Jan 28, 2014 at 04:13:52PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 28, 2014 at 02:24:42PM +0100, Daniel Vetter wrote:
> > On Wed, Jan 22, 2014 at 09:32:52PM +0200, ville.syrjala@linux.intel.com wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in
> > > W/A database and BSpec.
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_pm.c | 2 --
> > >  1 file changed, 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 895046f..62d339b 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -4930,8 +4930,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
> > >  
> > >  	/* WaDisableL3CacheAging:vlv */
> > >  	I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
> > > -	/* WaApplyL3ControlAndL3ChickenMode:vlv */
> > > -	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);
> > 
> > This one doesn't seem to be here ... is some earlier patch which I haven't
> > merged yet adding this? Can't we just fold this in?
> 
> ? I see you alreay applied this patch. Are ou trying to put it in twice?
> IIRC in the past we applied one workaround three times, now we're trying
> to not apply one twice :)

Oh right, Rodrigo reviewed this one yesterday already. Sorry for the
confusion ;-)
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 895046f..62d339b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4930,8 +4930,6 @@  static void valleyview_init_clock_gating(struct drm_device *dev)
 
 	/* WaDisableL3CacheAging:vlv */
 	I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
-	/* WaApplyL3ControlAndL3ChickenMode:vlv */
-	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);
 
 	/* WaForceL3Serialization:vlv */
 	I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &