| Message ID | 1390813231-15476-1-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Jan 27, 2014 at 10:00:30AM +0100, Daniel Vetter wrote: > Apparently we really only need this when the pfit is enabled, at least > I couldn't dicern any difference here. Furthermore the hacks we have > to reconstruct this bit is a bit glaring, and probably only works > because we can't move the lvds port to any other pipe than pipe B on > gen2/3. > > So let's just rip this out. > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> I've just written this exact patch again, so figured I might as well merge it. r-b still appreciated ... -Daniel > --- > drivers/gpu/drm/i915/intel_lvds.c | 7 ------- > drivers/gpu/drm/i915/intel_panel.c | 8 ++++---- > 2 files changed, 4 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c > index 8bcb93a2a9f6..8a3ebe940a74 100644 > --- a/drivers/gpu/drm/i915/intel_lvds.c > +++ b/drivers/gpu/drm/i915/intel_lvds.c > @@ -111,13 +111,6 @@ static void intel_lvds_get_config(struct intel_encoder *encoder, > > pipe_config->adjusted_mode.flags |= flags; > > - /* gen2/3 store dither state in pfit control, needs to match */ > - if (INTEL_INFO(dev)->gen < 4) { > - tmp = I915_READ(PFIT_CONTROL); > - > - pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; > - } > - > dotclock = pipe_config->port_clock; > > if (HAS_PCH_SPLIT(dev_priv->dev)) > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index 9f83ab06fb5e..41116753f1c0 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -308,16 +308,16 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, > pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | > PFIT_FILTER_FUZZY); > > + /* Make sure pre-965 set dither correctly for 18bpp panels. */ > + if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) > + pfit_control |= PANEL_8TO6_DITHER_ENABLE; > + > out: > if ((pfit_control & PFIT_ENABLE) == 0) { > pfit_control = 0; > pfit_pgm_ratios = 0; > } > > - /* Make sure pre-965 set dither correctly for 18bpp panels. */ > - if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) > - pfit_control |= PANEL_8TO6_DITHER_ENABLE; > - > pipe_config->gmch_pfit.control = pfit_control; > pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; > pipe_config->gmch_pfit.lvds_border_bits = border; > -- > 1.8.4.rc3 >
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 8bcb93a2a9f6..8a3ebe940a74 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -111,13 +111,6 @@ static void intel_lvds_get_config(struct intel_encoder *encoder, pipe_config->adjusted_mode.flags |= flags; - /* gen2/3 store dither state in pfit control, needs to match */ - if (INTEL_INFO(dev)->gen < 4) { - tmp = I915_READ(PFIT_CONTROL); - - pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; - } - dotclock = pipe_config->port_clock; if (HAS_PCH_SPLIT(dev_priv->dev)) diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 9f83ab06fb5e..41116753f1c0 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -308,16 +308,16 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | PFIT_FILTER_FUZZY); + /* Make sure pre-965 set dither correctly for 18bpp panels. */ + if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) + pfit_control |= PANEL_8TO6_DITHER_ENABLE; + out: if ((pfit_control & PFIT_ENABLE) == 0) { pfit_control = 0; pfit_pgm_ratios = 0; } - /* Make sure pre-965 set dither correctly for 18bpp panels. */ - if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) - pfit_control |= PANEL_8TO6_DITHER_ENABLE; - pipe_config->gmch_pfit.control = pfit_control; pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; pipe_config->gmch_pfit.lvds_border_bits = border;
Apparently we really only need this when the pfit is enabled, at least I couldn't dicern any difference here. Furthermore the hacks we have to reconstruct this bit is a bit glaring, and probably only works because we can't move the lvds port to any other pipe than pipe B on gen2/3. So let's just rip this out. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_lvds.c | 7 ------- drivers/gpu/drm/i915/intel_panel.c | 8 ++++---- 2 files changed, 4 insertions(+), 11 deletions(-)