| Message ID | 1390969547-1018-4-git-send-email-benjamin.widawsky@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> On Wed, Jan 29, 2014 at 2:25 AM, Ben Widawsky <benjamin.widawsky@intel.com> wrote: > Everything can be overridden by module parameters, so don't confuse the > users that are using them. > > We have RC6 turned on for all platforms which support it, but Ironlake, > so the need to explain the situation is no longer pressing. > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> > --- > drivers/gpu/drm/i915/intel_pm.c | 12 +++--------- > 1 file changed, 3 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 258241b..944b99c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3135,16 +3135,10 @@ static void valleyview_disable_rps(struct drm_device *dev) > > static void intel_print_rc6_info(struct drm_device *dev, u32 mode) > { > - if (IS_GEN6(dev)) > - DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n"); > - > - if (IS_HASWELL(dev)) > - DRM_DEBUG_DRIVER("Haswell: only RC6 available\n"); > - > DRM_INFO("Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n", > - (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off", > - (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off", > - (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off"); > + (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off", > + (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off", > + (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off"); > } > > int intel_enable_rc6(const struct drm_device *dev) > -- > 1.8.5.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky > <benjamin.widawsky@intel.com <mailto:benjamin.widawsky@intel.com>> wrote: > > Everything can be overridden by module parameters, so don't confuse the > users that are using them. > > We have RC6 turned on for all platforms which support it, but Ironlake, > so the need to explain the situation is no longer pressing. > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net <mailto:ben@bwidawsk.net>> > --- > drivers/gpu/drm/i915/intel_pm.c | 12 +++--------- > 1 file changed, 3 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 258241b..944b99c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3135,16 +3135,10 @@ static void valleyview_disable_rps(struct > drm_device *dev) > > static void intel_print_rc6_info(struct drm_device *dev, u32 mode) > { > - if (IS_GEN6(dev)) > - DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n"); > - > - if (IS_HASWELL(dev)) > - DRM_DEBUG_DRIVER("Haswell: only RC6 available\n"); > - > DRM_INFO("Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n", > - (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off", > - (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off", > - (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : > "off"); > + (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off", > + (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off", > + (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off"); > } > > int intel_enable_rc6(const struct drm_device *dev) > -- > 1.8.5.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org <mailto:Intel-gfx@lists.freedesktop.org> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > Reviewed-by: Deepak S <deepak.s@intel.com>
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 258241b..944b99c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3135,16 +3135,10 @@ static void valleyview_disable_rps(struct drm_device *dev) static void intel_print_rc6_info(struct drm_device *dev, u32 mode) { - if (IS_GEN6(dev)) - DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n"); - - if (IS_HASWELL(dev)) - DRM_DEBUG_DRIVER("Haswell: only RC6 available\n"); - DRM_INFO("Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n", - (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off", - (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off", - (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off"); + (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off", + (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off", + (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off"); } int intel_enable_rc6(const struct drm_device *dev)
Everything can be overridden by module parameters, so don't confuse the users that are using them. We have RC6 turned on for all platforms which support it, but Ironlake, so the need to explain the situation is no longer pressing. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- drivers/gpu/drm/i915/intel_pm.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-)