From patchwork Fri Jan 31 21:42:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jeff.mcgee@intel.com X-Patchwork-Id: 3563841 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1E0F99F381 for ; Fri, 31 Jan 2014 21:36:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4071820254 for ; Fri, 31 Jan 2014 21:36:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 65B9920253 for ; Fri, 31 Jan 2014 21:36:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D3E12108294; Fri, 31 Jan 2014 13:36:43 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 4FF04108278 for ; Fri, 31 Jan 2014 13:35:33 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 31 Jan 2014 13:31:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.95,759,1384329600"; d="scan'208";a="468004026" Received: from jeffdesk.fso.intel.com ([10.5.53.1]) by fmsmga001.fm.intel.com with ESMTP; 31 Jan 2014 13:35:32 -0800 From: jeff.mcgee@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 31 Jan 2014 15:42:50 -0600 Message-Id: <1391204572-18888-4-git-send-email-jeff.mcgee@intel.com> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <1391204572-18888-1-git-send-email-jeff.mcgee@intel.com> References: <1391204572-18888-1-git-send-email-jeff.mcgee@intel.com> Subject: [Intel-gfx] [PATCH 3/5] drm/i915: Add IPS debugfs disabling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jeff McGee i915_ips_disable: '0' - IPS enabled normally per device and settings. '1' - IPS explicitly disabled. Signed-off-by: Jeff McGee --- drivers/gpu/drm/i915/i915_debugfs.c | 47 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_display.c | 4 +++ 3 files changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index a51c357..949c6a4 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1413,6 +1413,52 @@ static int i915_ips_status(struct seq_file *m, void *unused) return 0; } +static int i915_ips_disable_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + drm_i915_private_t *dev_priv = dev->dev_private; + + if (!HAS_IPS(dev)) + return -ENODEV; + + *val = dev_priv->ips_disable; + + return 0; +} + +static int i915_ips_disable_set(void *data, u64 val) +{ + struct drm_device *dev = data; + drm_i915_private_t *dev_priv = dev->dev_private; + struct drm_crtc *crtc; + + if (!HAS_IPS(dev)) + return -ENODEV; + + if (dev_priv->ips_disable == (bool)val) + return 0; + + drm_modeset_lock_all(dev); + + DRM_DEBUG_DRIVER("Setting IPS disable %s\n", + val ? "true" : "false"); + + dev_priv->ips_disable = (bool)val; + + /* Reset enabled crtc to force IPS state update */ + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) + if (crtc->enabled) + intel_crtc_restore_mode(crtc); + + drm_modeset_unlock_all(dev); + + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_ips_disable_fops, + i915_ips_disable_get, i915_ips_disable_set, + "%llu\n"); + static int i915_sr_status(struct seq_file *m, void *unused) { struct drm_info_node *node = (struct drm_info_node *) m->private; @@ -3656,6 +3702,7 @@ static const struct i915_debugfs_files { {"i915_cur_freq", &i915_cur_freq_fops}, {"i915_rps_manual", &i915_rps_manual_fops}, {"i915_rc6_disable", &i915_rc6_disable_fops}, + {"i915_ips_disable", &i915_ips_disable_fops}, {"i915_cache_sharing", &i915_cache_sharing_fops}, {"i915_ring_stop", &i915_ring_stop_fops}, {"i915_ring_missed_irq", &i915_ring_missed_irq_fops}, diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9893451..93e1547 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1532,6 +1532,8 @@ typedef struct drm_i915_private { * mchdev_lock in intel_pm.c */ struct intel_ilk_power_mgmt ips; + bool ips_disable; + struct i915_power_domains power_domains; struct i915_psr psr; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 4d4a0d9..5af41ce 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4580,7 +4580,11 @@ retry: static void hsw_compute_ips_config(struct intel_crtc *crtc, struct intel_crtc_config *pipe_config) { + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + pipe_config->ips_enabled = i915.enable_ips && + !dev_priv->ips_disable && hsw_crtc_supports_ips(crtc) && pipe_config->pipe_bpp <= 24; }