From patchwork Fri Jan 31 21:42:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jeff.mcgee@intel.com X-Patchwork-Id: 3563811 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 60E30C02DC for ; Fri, 31 Jan 2014 21:36:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7ECD620254 for ; Fri, 31 Jan 2014 21:36:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 95AAA20253 for ; Fri, 31 Jan 2014 21:36:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0CAD4108285; Fri, 31 Jan 2014 13:36:29 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 591B1FA505 for ; Fri, 31 Jan 2014 13:35:33 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 31 Jan 2014 13:31:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.95,759,1384329600"; d="scan'208";a="468004030" Received: from jeffdesk.fso.intel.com ([10.5.53.1]) by fmsmga001.fm.intel.com with ESMTP; 31 Jan 2014 13:35:32 -0800 From: jeff.mcgee@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 31 Jan 2014 15:42:51 -0600 Message-Id: <1391204572-18888-5-git-send-email-jeff.mcgee@intel.com> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <1391204572-18888-1-git-send-email-jeff.mcgee@intel.com> References: <1391204572-18888-1-git-send-email-jeff.mcgee@intel.com> Subject: [Intel-gfx] [PATCH 4/5] drm/i915: Add FBC debugfs disabling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jeff McGee i915_fbc_disable: '0' - FBC enabled normally per device and settings. '1' - FBC explicitly disabled. Signed-off-by: Jeff McGee --- drivers/gpu/drm/i915/i915_debugfs.c | 50 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/intel_pm.c | 5 ++++ 3 files changed, 58 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 949c6a4..92f6213 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1386,6 +1386,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused) case FBC_CHIP_DEFAULT: seq_puts(m, "disabled per chip default"); break; + case FBC_DEBUG_FS: + seq_puts(m, "disabled per debugfs"); + break; default: seq_puts(m, "unknown reason"); } @@ -1394,6 +1397,52 @@ static int i915_fbc_status(struct seq_file *m, void *unused) return 0; } +static int i915_fbc_disable_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + drm_i915_private_t *dev_priv = dev->dev_private; + + if (!HAS_FBC(dev)) + return -ENODEV; + + *val = dev_priv->fbc.disable; + + return 0; +} + +static int i915_fbc_disable_set(void *data, u64 val) +{ + struct drm_device *dev = data; + drm_i915_private_t *dev_priv = dev->dev_private; + struct drm_crtc *crtc; + + if (!HAS_FBC(dev)) + return -ENODEV; + + if (dev_priv->fbc.disable == (bool)val) + return 0; + + drm_modeset_lock_all(dev); + + DRM_DEBUG_DRIVER("Setting FBC disable %s\n", + val ? "true" : "false"); + + dev_priv->fbc.disable = (bool)val; + + /* Reset enabled crtc to force FBC state update */ + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) + if (crtc->enabled) + intel_crtc_restore_mode(crtc); + + drm_modeset_unlock_all(dev); + + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_fbc_disable_fops, + i915_fbc_disable_get, i915_fbc_disable_set, + "%llu\n"); + static int i915_ips_status(struct seq_file *m, void *unused) { struct drm_info_node *node = (struct drm_info_node *) m->private; @@ -3703,6 +3752,7 @@ static const struct i915_debugfs_files { {"i915_rps_manual", &i915_rps_manual_fops}, {"i915_rc6_disable", &i915_rc6_disable_fops}, {"i915_ips_disable", &i915_ips_disable_fops}, + {"i915_fbc_disable", &i915_fbc_disable_fops}, {"i915_cache_sharing", &i915_cache_sharing_fops}, {"i915_ring_stop", &i915_ring_stop_fops}, {"i915_ring_missed_irq", &i915_ring_missed_irq_fops}, diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 93e1547..18b2849 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -763,7 +763,10 @@ struct i915_fbc { FBC_MULTIPLE_PIPES, /* more than one pipe active */ FBC_MODULE_PARAM, FBC_CHIP_DEFAULT, /* disabled by default on this chip */ + FBC_DEBUG_FS, /* user requests disabling through debugfs */ } no_fbc_reason; + + bool disable; }; struct i915_psr { diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6478116..a8605fc 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -519,6 +519,11 @@ void intel_update_fbc(struct drm_device *dev) DRM_DEBUG_KMS("fbc disabled per module param\n"); goto out_disable; } + if (dev_priv->fbc.disable) { + if (set_no_fbc_reason(dev_priv, FBC_DEBUG_FS)) + DRM_DEBUG_KMS("fbc disabled per debugfs\n"); + goto out_disable; + } if ((adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) || (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)) { if (set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED_MODE))