From patchwork Fri Feb 7 14:14:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 3605351 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F0F1A9F2E9 for ; Fri, 7 Feb 2014 14:14:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DA94220120 for ; Fri, 7 Feb 2014 14:14:33 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B646620114 for ; Fri, 7 Feb 2014 14:14:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B3C0F9F6C; Fri, 7 Feb 2014 06:14:30 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f181.google.com (mail-ea0-f181.google.com [209.85.215.181]) by gabe.freedesktop.org (Postfix) with ESMTP id 07B87F9E55 for ; Fri, 7 Feb 2014 06:14:26 -0800 (PST) Received: by mail-ea0-f181.google.com with SMTP id m10so1585370eaj.26 for ; Fri, 07 Feb 2014 06:14:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id; bh=5eSmzejg1iDDJrJ5Z/141ddMz74dlUBcHiXc+q1mV88=; b=EVKCPUZc/DtGdQqrmazoaHtiDqiL91DvSW9Nrn8lOSXyzUUUKqjaJQGGXFJVgBuloa FBYWQmim+xyE/prENB+8N7leG8ffM7RyKVkyUz0bQWuqL7FYfLHdyUWYvJHTOs1s0ifH qrxP/nLvSng14wV4dgG1ruQw2v5XJPOMgcKtA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5eSmzejg1iDDJrJ5Z/141ddMz74dlUBcHiXc+q1mV88=; b=elh/q9tR5YlXlN/vicAhkUn3AeVkmxaELASHWFZ7SPVCn44HeMEgYRzow40IFqnDKg jgMmQCcCtntyMfGZdgleTKZRk+2ZYCEPsk/hS2YziLOgZtMdXf0fzEEHVsqzR/fU3Yc3 2mS+MBoyZgRpz2DbZ1OgQlY2VHot9cybQ2dDa8mNLH7TYBSwseVKGaEVH/+DR7t9cbPI 2AtSjKrT6hAgJZ7pXuV56fzCB8XLANApzHGEfsCowq3qVnuYnPGoZLn5bdPFMZa598h3 sVdOiBjDTPOs3nGGSVFBSDe3n1LcGAYXehV5GauXQDU67VedSKTMZo+cikZsAXfHTNsQ buSw== X-Gm-Message-State: ALoCoQlnxobFbP4djUEqydumsgy2j5JQhc3ZeD50Qb0oH9b0F1L1ulAzvUFkJq+/4RAvmrlHb/S6 X-Received: by 10.15.102.78 with SMTP id bq54mr3234378eeb.94.1391782463326; Fri, 07 Feb 2014 06:14:23 -0800 (PST) Received: from phenom.ffwll.local (84-73-67-144.dclient.hispeed.ch. [84.73.67.144]) by mx.google.com with ESMTPSA id m1sm16865762een.7.2014.02.07.06.14.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 07 Feb 2014 06:14:21 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Fri, 7 Feb 2014 15:14:01 +0100 Message-Id: <1391782441-9475-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.8.5.2 Cc: Jani Nikula , Daniel Vetter , Jiri Kosina Subject: [Intel-gfx] [PATCH] drm/i915: Disable dp aux irq on g4x X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Apparently it's broken in the exact same way as the gmbus irq. For reference of the full story see commit c12aba5aa0e60b7947bc8b6ea25ef55c4acf81a4 Author: Jiri Kosina Date: Tue Mar 19 09:56:57 2013 +0100 drm/i915: stop using GMBUS IRQs on Gen4 chips The effect is that we have a storm of unclaimed interrupts on the legacy irq line. If that one is used by a different device then the kernel will complain and rather quickly kill the irq source. Which breaks any device trying to actually use the legacy irq line. This regression has been introduced commit 4aeebd7443e36b0a40032e518a9338f48bd27efc Author: Daniel Vetter Date: Thu Oct 31 09:53:36 2013 +0100 drm/i915: dp aux irq support for g4x/vlv v2: Cross-reference dp aux and gmbus gen4 comments. Cc: Jani Nikula Cc: Jiri Kosina Cc: Chris Wilson Reported-and-tested-by: Jiri Kosina Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_dp.c | 10 +++++++++- drivers/gpu/drm/i915/intel_i2c.c | 7 ++++--- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index c00b6e352c2b..341da95ddc87 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -390,6 +390,14 @@ static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp, } } +/* + * dp aux on gen4 seems to be able to generate legacy interrupts even when in MSI + * mode (similar to how gmbus is broken). This results in spurious interrupt + * warnings if the legacy irq no. is shared with another device. The kernel then + * disables that interrupt source and so prevents the other device from working + * properly. + */ +#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) static int intel_dp_aux_ch(struct intel_dp *intel_dp, uint8_t *send, int send_bytes, @@ -404,7 +412,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, int i, ret, recv_bytes; uint32_t status; int try, precharge, clock = 0; - bool has_aux_irq = true; + bool has_aux_irq = HAS_AUX_IRQ(dev); uint32_t timeout; /* dp aux is extremely sensitive to irq latency, hence request the diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index b1dc33f47899..1a3d512e4efa 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -260,9 +260,10 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin) /* * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI - * mode. This results in spurious interrupt warnings if the legacy irq no. is - * shared with another device. The kernel then disables that interrupt source - * and so prevents the other device from working properly. + * mode (similar to how dp aux is broken). This results in spurious interrupt + * warnings if the legacy irq no. is shared with another device. The kernel then + * disables that interrupt source and so prevents the other device from working + * properly. */ #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) static int