From patchwork Tue Feb 18 03:01:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 3666911 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 27BA5BF40C for ; Tue, 18 Feb 2014 03:02:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4F96D201FD for ; Tue, 18 Feb 2014 03:02:11 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4B581201F7 for ; Tue, 18 Feb 2014 03:02:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B3196FA93E; Mon, 17 Feb 2014 19:02:03 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 9DE8AFA92E for ; Mon, 17 Feb 2014 19:01:58 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 17 Feb 2014 19:01:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,499,1389772800"; d="scan'208";a="484967271" Received: from unknown (HELO ironside.amr.corp.intel.com) ([10.255.13.201]) by orsmga002.jf.intel.com with ESMTP; 17 Feb 2014 19:01:57 -0800 From: Ben Widawsky To: Intel GFX Date: Mon, 17 Feb 2014 19:01:43 -0800 Message-Id: <1392692512-2268-3-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.8.5.5 In-Reply-To: <1392692512-2268-1-git-send-email-benjamin.widawsky@intel.com> References: <1390969547-1018-2-git-send-email-benjamin.widawsky@intel.com> <1392692512-2268-1-git-send-email-benjamin.widawsky@intel.com> Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 02/11] drm/i915: Fix coding style for RPS X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduced: commit b8a5ff8d7c676a04e0da5ec16bb068dd39459042 Author: Jeff McGee Date: Tue Feb 4 11:37:01 2014 -0600 drm/i915: Update rps interrupt limits Cc: Jeff McGee Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_sysfs.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 0c741f4..e9ffefb 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -356,12 +356,12 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, valleyview_set_rps(dev, val); else gen6_set_rps(dev, val); - } - else if (!IS_VALLEYVIEW(dev)) - /* We still need gen6_set_rps to process the new max_delay - and update the interrupt limits even though frequency - request is unchanged. */ + } else if (!IS_VALLEYVIEW(dev)) { + /* We still need gen6_set_rps to process the new max_delay and + * update the interrupt limits even though frequency request is + * unchanged. */ gen6_set_rps(dev, dev_priv->rps.cur_delay); + } mutex_unlock(&dev_priv->rps.hw_lock); @@ -430,12 +430,12 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, valleyview_set_rps(dev, val); else gen6_set_rps(dev, val); - } - else if (!IS_VALLEYVIEW(dev)) - /* We still need gen6_set_rps to process the new min_delay - and update the interrupt limits even though frequency - request is unchanged. */ + } else if (!IS_VALLEYVIEW(dev)) { + /* We still need gen6_set_rps to process the new min_delay and + * update the interrupt limits even though frequency request is + * unchanged. */ gen6_set_rps(dev, dev_priv->rps.cur_delay); + } mutex_unlock(&dev_priv->rps.hw_lock);