[v2,2/3] drm/i915: New drm crtc property for varying the Pipe Src size

Commit Message

[e-mail] March 11, 2014, 12:54 p.m. UTC

From: Akash Goel <[e-mail]>

This patch adds a new drm crtc property for varying the Pipe Src size
or the Panel fitter input size. Pipe Src controls the size that is
scaled from.
This will allow to dynamically flip (without modeset) the frame buffers
of different resolutions

v2: Added a check to fail the set property call if Panel fitter is
disabled & new PIPESRC programming do not match with PIPE timings.
Removed the pitch mismatch check on frame buffer, when being flipped.
This is currently done only for VLV/HSW.

Testcase: igt/kms_panel_fitter_test

Signed-off-by: Akash Goel <[e-mail]>
---
 drivers/gpu/drm/i915/i915_drv.h      |  6 ++++
 drivers/gpu/drm/i915/intel_display.c | 60 ++++++++++++++++++++++++++++++++++--
 2 files changed, 64 insertions(+), 2 deletions(-)

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a0d90ef..6f3af15 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1608,6 +1608,12 @@  typedef struct drm_i915_private {
 	struct drm_property *broadcast_rgb_property;
 	struct drm_property *force_audio_property;
 
+	/*
+	 * Property to dynamically vary the size of the
+	 * PIPESRC or Panel fitter input size
+	 */
+	struct drm_property *input_size_property;
+
 	uint32_t hw_context_size;
 	struct list_head context_list;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5dfe156..8772390 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8935,8 +8935,18 @@  static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	 * Note that pitch changes could also affect these register.
 	 */
 	if (INTEL_INFO(dev)->gen > 3 &&
-	    (fb->offsets[0] != crtc->fb->offsets[0] ||
-	     fb->pitches[0] != crtc->fb->pitches[0]))
+	    (fb->offsets[0] != crtc->fb->offsets[0]))
+		return -EINVAL;
+
+	/*
+	 * Bypassing the fb pitch check for VLV/HSW, as purportedly there
+	 * is a dynamic flip support in VLV/HSW. This will allow to
+	 * flip fbs of different resolutions without doing a modeset.
+	 * TBD, confirm the same for other newer gen platforms also.
+	 */
+	if (INTEL_INFO(dev)->gen > 3 &&
+	    !IS_VALLEYVIEW(dev) && !IS_HASWELL(dev) &&
+	    (fb->pitches[0] != crtc->fb->pitches[0]))
 		return -EINVAL;
 
 	if (i915_terminally_wedged(&dev_priv->gpu_error))
@@ -10434,8 +10444,45 @@  out_config:
 static int intel_crtc_set_property(struct drm_crtc *crtc,
 		struct drm_property *property, uint64_t val)
 {
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int ret = -ENOENT;
 
+	if (property == dev_priv->input_size_property) {
+		int new_width = (int)((val >> 16) & 0xffff);
+		int new_height = (int)(val & 0xffff);
+
+		if ((new_width == intel_crtc->config.pipe_src_w) &&
+		    (new_height == intel_crtc->config.pipe_src_h))
+			return 0;
+
+		if ((!intel_crtc->config.gmch_pfit.control) &&
+		    ((intel_crtc->config.adjusted_mode.hdisplay) != (new_width) ||
+		     (intel_crtc->config.adjusted_mode.vdisplay) != (new_height))) {
+			DRM_ERROR("PIPESRC mismatch with Pipe timings & PF is disabled\n");
+			return -EINVAL;
+		}
+
+		intel_crtc->config.pipe_src_w = new_width;
+		intel_crtc->config.pipe_src_h = new_height;
+
+		intel_crtc->config.requested_mode.hdisplay = new_width;
+		intel_crtc->config.requested_mode.vdisplay = new_height;
+
+		crtc->mode.hdisplay = new_width;
+		crtc->mode.vdisplay = new_height;
+
+		/* pipesrc controls the size that is scaled from, which should
+		* always be the user's requested size.
+		*/
+		I915_WRITE(PIPESRC(intel_crtc->pipe),
+			((intel_crtc->config.pipe_src_w - 1) << 16) |
+			 (intel_crtc->config.pipe_src_h - 1));
+
+		return 0;
+	}
+
 	return ret;
 }
 
@@ -10586,6 +10633,15 @@  static void intel_crtc_init(struct drm_device *dev, int pipe)
 	dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base;
 
 	drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
+
+	if (!dev_priv->input_size_property)
+		dev_priv->input_size_property =
+			drm_property_create_range(dev, 0, "input size", 0, 0xFFFFFFFF);
+
+	if (dev_priv->input_size_property)
+		drm_object_attach_property(&intel_crtc->base.base,
+					   dev_priv->input_size_property,
+					   0);
 }
 
 enum pipe intel_get_pipe_from_connector(struct intel_connector *connector)