diff mbox

[v2] drm/i915: Enable FBC on GEN7 by default

Message ID 1395713609-6642-1-git-send-email-benjamin.widawsky@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ben Widawsky March 25, 2014, 2:13 a.m. UTC 
I am not clear why we've never enabled it by default for GEN7. Looking
at the git hostiry, it seems Rodrigo disabled it by default, and it's
never been turned on. Quite a few fixes have gone in over the past year,
and I think many of us are running this successfully.

If there is some reason we know of why we don't enable this by default
on GEN7, then please ignore the patch, and forgive my laziness.

v2: Disable FBC if width is greater than 2k, and user doesn't override.  This
is due to issues seen by Stéphane, and possibly others. I wasn't sure what to
do with max_height.  v2 was only compile tested.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a7da962..2529cb8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -512,7 +512,7 @@  void intel_update_fbc(struct drm_device *dev)
 	adjusted_mode = &intel_crtc->config.adjusted_mode;
 
 	if (i915.enable_fbc < 0 &&
-	    INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
+	    INTEL_INFO(dev)->gen <= 6) {
 		if (set_no_fbc_reason(dev_priv, FBC_CHIP_DEFAULT))
 			DRM_DEBUG_KMS("disabled per chip default\n");
 		goto out_disable;
@@ -530,7 +530,14 @@  void intel_update_fbc(struct drm_device *dev)
 		goto out_disable;
 	}
 
-	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
+	/* If the user hasn't overridden the defaults, try to get them working
+	 * FBC on GEN7. If they have overridden the defaults, then assume they
+	 * know what they're doing and allow foot shooting.
+	 */
+	if (i915.enable_fbc < 0 && IS_GEN7(dev) && !IS_HASWELL(dev)) {
+		max_width = 2048;
+		max_height = -1;
+	} else if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
 		max_width = 4096;
 		max_height = 2048;
 	} else {