From patchwork Sun Apr 6 19:54:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 3943701 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 09EBA9F374 for ; Sun, 6 Apr 2014 19:54:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0CE1B202A1 for ; Sun, 6 Apr 2014 19:54:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C207F2020F for ; Sun, 6 Apr 2014 19:54:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 32ED86E457; Sun, 6 Apr 2014 12:54:22 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.bwidawsk.net (bwidawsk.net [166.78.191.112]) by gabe.freedesktop.org (Postfix) with ESMTP id F38756E45A for ; Sun, 6 Apr 2014 12:54:20 -0700 (PDT) Received: by mail.bwidawsk.net (Postfix, from userid 5001) id 9A2F04A6AC; Sun, 6 Apr 2014 12:54:19 -0700 (PDT) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from ironside.amr.corp.intel.com (unknown [198.0.49.227]) by mail.bwidawsk.net (Postfix) with ESMTPSA id 7E70C4A6CB for ; Sun, 6 Apr 2014 12:54:13 -0700 (PDT) From: Ben Widawsky To: Intel GFX Date: Sun, 6 Apr 2014 12:54:10 -0700 Message-Id: <1396814050-10338-2-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1396814050-10338-1-git-send-email-benjamin.widawsky@intel.com> References: <1396814050-10338-1-git-send-email-benjamin.widawsky@intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/bdw: Create a state setup hook X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Mika Kuoppala Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem_context.c | 3 +++ drivers/gpu/drm/i915/intel_uncore.c | 8 ++++++++ 3 files changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 952fdba..9f6a8c1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -501,6 +501,8 @@ struct intel_uncore_funcs { uint32_t val, bool trace); void (*mmio_writeq)(struct drm_i915_private *dev_priv, off_t offset, uint64_t val, bool trace); + + int (*hw_state_setup)(struct drm_device *dev); }; struct intel_uncore { diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index fdf1736..513beea 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -491,6 +491,9 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv) struct intel_ring_buffer *ring; int ret, i; + if (dev_priv->uncore.funcs.hw_state_setup(dev_priv->dev)) + dev_priv->uncore.funcs.hw_state_setup(dev_priv->dev); + if (!HAS_HW_CONTEXTS(dev_priv->dev)) return 0; diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index e206c41..9241901 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -40,6 +40,8 @@ #define __raw_posting_read(dev_priv__, reg__) (void)__raw_i915_read32(dev_priv__, reg__) +static int gen8_hw_state_setup(struct drm_device *dev); + static void assert_device_not_suspended(struct drm_i915_private *dev_priv) { @@ -800,6 +802,7 @@ void intel_uncore_init(struct drm_device *dev) dev_priv->uncore.funcs.mmio_writel = gen8_write32; dev_priv->uncore.funcs.mmio_writeq = gen8_write64; + dev_priv->uncore.funcs.hw_state_setup = gen8_hw_state_setup; break; case 7: if (IS_HASWELL(dev)) { @@ -1068,3 +1071,8 @@ void intel_uncore_check_errors(struct drm_device *dev) __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM); } } + +static int gen8_hw_state_setup(struct drm_device *dev) +{ + return 0; +}