From patchwork Sat Apr 12 17:31:22 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 3973131 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DD4D69F374 for ; Sat, 12 Apr 2014 17:31:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D5684202FE for ; Sat, 12 Apr 2014 17:31:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D3E73202D1 for ; Sat, 12 Apr 2014 17:31:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 52DBD6E584; Sat, 12 Apr 2014 10:31:30 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id C11AB6E584 for ; Sat, 12 Apr 2014 10:31:28 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id c41so5135597eek.36 for ; Sat, 12 Apr 2014 10:31:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id; bh=EyrSov7ASYX2f9FuThmR/IZNQft8Iz2xwKwgZ5FuSac=; b=lLrVYM/PoNx2BqQR6aCICYQeqpR0+0OA1jjOhxIZP0yZTUeiKTvo8g2by9SDX59TAU ikUqp6EMy6fwFGQNzXL/qbzcOFa+8d5Y/TP7uMuCU/VZMjZ0ybaeeAJ9NzZOmjTZMV9I JXP3Pueuc7ZkZIqeIVzu8+XRmOtNSATNJiuPc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=EyrSov7ASYX2f9FuThmR/IZNQft8Iz2xwKwgZ5FuSac=; b=iroi2rCBT64Pyc5qnVKttPyrv7cvq55f+sP4oihOdQzMC1979ScEyykMop72mipOaq 7TcvUvxttXVY5AdH+v8XsuRDYU/Q3FPte+WBGPkUJ5shMYUpsOW+p/iOx225fsjumiBa OihP6FQQXs2gpFseJ2KQ48twgWIXe3GbQot/tGRylDnXDgUZIlF9Q4DsCMeXHVZRHWDR XsURqj7lRMKt/e/NwbcqmqIeti5wShTXQFWPYFxDG4KluzZKKaFC9Tcm3hjd82JDOYZ4 +HfzhydTuNqsHEvsQ5ri8O5ReVAzt3bhU0p/0ogEeDHem9ST3UiKK2ob65ahY49gDdSE zNXw== X-Gm-Message-State: ALoCoQnFu7o7N8t7EkbLIqdxekDj8NIL+72hmOn5ihMZ4WJmnXqeEuS2RzOvG2jdDM8tjvXS+wMg X-Received: by 10.14.206.137 with SMTP id l9mr38828653eeo.40.1397323887738; Sat, 12 Apr 2014 10:31:27 -0700 (PDT) Received: from phenom.ffwll.local (84-73-67-144.dclient.hispeed.ch. [84.73.67.144]) by mx.google.com with ESMTPSA id a42sm26827283ees.10.2014.04.12.10.31.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 12 Apr 2014 10:31:26 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sat, 12 Apr 2014 19:31:22 +0200 Message-Id: <1397323882-31195-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.8.5.2 Cc: Egbert Eich , Daniel Vetter , stable@vger.kernel.org, bitlord Subject: [Intel-gfx] [PATCH] drm/i915: Don't WARN about unexpected hpd interrupts on gmch platforms X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The status bits are unconditionally set, the control bits only enable the actual interrupt generation. Which means if we get some random other interrupts we'll bogusly complain about them. So restrict the WARN to platforms with a sane hotplug interrupt handling scheme. This WARN has been introduced in commit b8f102e8bf71cacf33326360fdf9dcfd1a63925b Author: Egbert Eich Date: Fri Jul 26 14:14:24 2013 +0200 drm/i915: Add messages useful for HPD storm detection debugging (v2) Cc: Egbert Eich Cc: bitlord Reported-by: bitlord Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_irq.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 7753249b3a95..f98ba4e6e70b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1362,10 +1362,20 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev, spin_lock(&dev_priv->irq_lock); for (i = 1; i < HPD_NUM_PINS; i++) { - WARN_ONCE(hpd[i] & hotplug_trigger && - dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED, - "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n", - hotplug_trigger, i, hpd[i]); + if (hpd[i] & hotplug_trigger && + dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED) { + /* + * On GMCH platforms the interrupt mask bits only + * prevent irq generation, not the setting of the + * hotplug bits itself. So only WARN about unexpected + * interrupts on saner platforms. + */ + WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev), + "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n", + hotplug_trigger, i, hpd[i]); + + continue; + } if (!(hpd[i] & hotplug_trigger) || dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED)