From patchwork Sun May 4 11:18:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: akash.goel@intel.com X-Patchwork-Id: 4107471 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 274BFBFF02 for ; Sun, 4 May 2014 11:15:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6695E203B8 for ; Sun, 4 May 2014 11:15:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9981320398 for ; Sun, 4 May 2014 11:15:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1021F6E4E2; Sun, 4 May 2014 04:15:38 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 9390E6E4E2 for ; Sun, 4 May 2014 04:15:35 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 04 May 2014 04:15:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,982,1389772800"; d="scan'208";a="505641460" Received: from akashgoe-desktop.iind.intel.com ([10.223.82.135]) by orsmga001.jf.intel.com with ESMTP; 04 May 2014 04:15:33 -0700 From: akash.goel@intel.com To: intel-gfx@lists.freedesktop.org Date: Sun, 4 May 2014 16:48:25 +0530 Message-Id: <1399202305-5765-3-git-send-email-akash.goel@intel.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1399202305-5765-1-git-send-email-akash.goel@intel.com> References: <1399202305-5765-1-git-send-email-akash.goel@intel.com> Cc: sourab.gupta@intel.com, Akash Goel Subject: [Intel-gfx] [RFC 2/2] drm/i915: Moved the cache flush outside the 'struct_mutex' lock X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Akash Goel Moved the cache flush of the preallocated shmem pages outside the span of 'struct_mutex' lock. This shall not lead to any redundancy as the cache flush of the newly allocated pages will be done anyways when same buffer is submitted to GPU or when the domain of the object is changed from CPU to GTT in Gem page fault handler. Signed-off-by: Akash Goel --- drivers/gpu/drm/i915/i915_gem.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b19ccb8..7ab2635 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1936,8 +1936,11 @@ i915_gem_object_shmem_preallocate(struct drm_i915_gem_object *obj) if (IS_ERR(page)) { DRM_DEBUG_DRIVER("Failure for obj(%p), size(%x) at page(%d)\n", obj, obj->base.size, i); - break; + return; } + /* Flush the cpu cache for the page now itself */ + drm_clflush_pages(&page, 1); + /* Decrement the extra ref count on the returned page, otherwise when 'get_pages_gtt' will be called later on in the regular path, it will also increment the ref count, @@ -1945,6 +1948,14 @@ i915_gem_object_shmem_preallocate(struct drm_i915_gem_object *obj) page_cache_release(page); } + /* + * Reset the CPU domain now itself, so as to avoid the cache + * flush later (under 'struct_mutex' lock), as the all pages + * have been cache flushed. + * Hope this is safe enough to be done here. + */ + obj->base.write_domain = 0; + trace_i915_gem_obj_prealloc_end(obj); }