From patchwork Thu May 8 19:19:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 4138331 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 42E799F1E1 for ; Thu, 8 May 2014 19:20:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 68266202D1 for ; Thu, 8 May 2014 19:20:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7B77B20253 for ; Thu, 8 May 2014 19:20:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 178C26E810; Thu, 8 May 2014 12:20:00 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id D76396E7FE for ; Thu, 8 May 2014 12:19:58 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 08 May 2014 12:14:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="4.97,1012,1389772800"; d="scan'208"; a="537264034" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.65]) by orsmga002.jf.intel.com with SMTP; 08 May 2014 12:19:47 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 08 May 2014 22:19:46 +0300 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 8 May 2014 22:19:41 +0300 Message-Id: <1399576782-15256-2-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1399576782-15256-1-git-send-email-ville.syrjala@linux.intel.com> References: <874n102kwb.fsf@intel.com> <1399576782-15256-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Cc: Ingo Molnar , "H. Peter Anvin" Subject: [Intel-gfx] [PATCH v5 34.2/71] x86/gpu: Implement stolen memory size early quirk for CHV X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Damien Lespiau CHV uses the same bits as SNB/VLV to code the Graphics Mode Select field (GFX stolen memory size) with the addition of finer granularity modes: 4MB increments from 0x11 (8MB) to 0x1d. Values strictly above 0x1d are either reserved or not supported. v2: 4MB increments, not 8MB. 32MB has been omitted from the list of new values (Ville Syrjälä) v3: Also correctly interpret GGMS (GTT Graphics Memory Size) (Ville Syrjälä) v4: Don't assign a value that needs 20bits or more to a u16 (Rafael Barbalho) [vsyrjala: v5: Split from i915 changes and add chv_stolen_funcs] Cc: Ingo Molnar Cc: H. Peter Anvin Reviewed-by: Jani Nikula Reviewed-by: Ville Syrjälä Reviewed-by: Rafael Barbalho Tested-by: Rafael Barbalho Signed-off-by: Damien Lespiau Signed-off-by: Ville Syrjälä --- Note to x86 folks: This depends on INTEL_CHV_IDS() which is part of some other i915 patch, so I think it would be easiest to merge this through Daniel's tree. arch/x86/kernel/early-quirks.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 6e2537c..8323575 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -428,6 +428,26 @@ static size_t gen8_stolen_size(int num, int slot, int func) return gmch_ctrl << 25; /* 32 MB units */ } +static size_t __init chv_stolen_size(int num, int slot, int func) +{ + u16 gmch_ctrl; + + gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL); + gmch_ctrl >>= SNB_GMCH_GMS_SHIFT; + gmch_ctrl &= SNB_GMCH_GMS_MASK; + + /* + * 0x0 to 0x10: 32MB increments starting at 0MB + * 0x11 to 0x16: 4MB increments starting at 8MB + * 0x17 to 0x1d: 4MB increments start at 36MB + */ + if (gmch_ctrl < 0x11) + return gmch_ctrl << 25; + else if (gmch_ctrl < 0x17) + return (gmch_ctrl - 0x11 + 2) << 22; + else + return (gmch_ctrl - 0x17 + 9) << 22; +} struct intel_stolen_funcs { size_t (*size)(int num, int slot, int func); @@ -469,6 +489,11 @@ static const struct intel_stolen_funcs gen8_stolen_funcs = { .size = gen8_stolen_size, }; +static const struct intel_stolen_funcs chv_stolen_funcs = { + .base = intel_stolen_base, + .size = chv_stolen_size, +}; + static struct pci_device_id intel_stolen_ids[] __initdata = { INTEL_I830_IDS(&i830_stolen_funcs), INTEL_I845G_IDS(&i845_stolen_funcs), @@ -495,7 +520,8 @@ static struct pci_device_id intel_stolen_ids[] __initdata = { INTEL_HSW_D_IDS(&gen6_stolen_funcs), INTEL_HSW_M_IDS(&gen6_stolen_funcs), INTEL_BDW_M_IDS(&gen8_stolen_funcs), - INTEL_BDW_D_IDS(&gen8_stolen_funcs) + INTEL_BDW_D_IDS(&gen8_stolen_funcs), + INTEL_CHV_IDS(&chv_stolen_funcs), }; static void __init intel_graphics_stolen(int num, int slot, int func)