@@ -27,6 +27,7 @@ gem_ctx_create
gem_ctx_exec
gem_double_irq_loop
gem_dummy_reloc_loop
+gem_error_capture
gem_evict_alignment
gem_evict_everything
gem_exec_bad_domains
@@ -24,6 +24,7 @@ TESTS_progs_M = \
gem_ctx_bad_exec \
gem_ctx_exec \
gem_dummy_reloc_loop \
+ gem_error_capture \
gem_evict_alignment \
gem_evict_everything \
gem_exec_bad_domains \
new file mode 100644
@@ -0,0 +1,254 @@
+/*
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Oscar Mateo <oscar.mateo@intel.com>
+ *
+ */
+
+/*
+ * Testcase: Check whether basic error state capture/dump mechanism is correctly
+ * working for all rings.
+ */
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include "drm.h"
+#include "ioctl_wrappers.h"
+#include "drmtest.h"
+#include "intel_io.h"
+#include "igt_debugfs.h"
+#include "intel_chipset.h"
+
+#define MAGIC_NUMBER 0x10001
+uint32_t batch[4] = {MI_NOOP, MI_BATCH_BUFFER_END, MAGIC_NUMBER, MAGIC_NUMBER};
+static uint32_t devid;
+
+static void clear_error_state(void)
+{
+ int fd;
+ static const char buf[] = "";
+
+ fd = igt_debugfs_open("i915_error_state", O_WRONLY);
+ igt_assert(fd >= 0);
+
+ igt_assert(write(fd, buf, sizeof(buf)) == sizeof(buf));
+ close(fd);
+}
+
+static void check_error_state(const char *expected_ring_name,
+ uint64_t expected_offset)
+{
+ FILE *file;
+ int debug_fd;
+ char *line = NULL;
+ size_t line_size = 0;
+ char *ring_name = NULL;
+ bool bb_ok = false, req_ok = false, ringbuf_ok = false;
+
+ debug_fd = igt_debugfs_open("i915_error_state", O_RDONLY);
+ igt_assert(debug_fd >= 0);
+ file = fdopen(debug_fd, "r");
+
+ while (getline(&line, &line_size, file) > 0) {
+ char *dashes = NULL;
+ int bb_matched = 0;
+ uint32_t gtt_offset;
+ int req_matched = 0;
+ int requests;
+ uint32_t tail;
+ int ringbuf_matched = 0;
+ int i, items;
+
+ dashes = strstr(line, "---");
+ if (!dashes)
+ continue;
+
+ ring_name = realloc(ring_name, dashes - line);
+ strncpy(ring_name, line, dashes - line);
+ ring_name[dashes - line - 1] = '\0';
+
+ bb_matched = sscanf(dashes, "--- gtt_offset = 0x%08x\n",
+ >t_offset);
+ if (bb_matched == 1) {
+ char expected_line[32];
+
+ igt_assert(strstr(ring_name, expected_ring_name));
+ igt_assert(gtt_offset == expected_offset);
+
+ for (i = 0; i < sizeof(batch) / 4; i++) {
+ igt_assert(getline(&line, &line_size, file) > 0);
+ snprintf(expected_line, sizeof(expected_line), "%08x : %08x",
+ 4*i, batch[i]);
+ igt_assert(strstr(line, expected_line));
+ }
+ bb_ok = true;
+ continue;
+ }
+
+ req_matched = sscanf(dashes, "--- %d requests\n", &requests);
+ if (req_matched == 1) {
+ igt_assert(strstr(ring_name, expected_ring_name));
+ igt_assert(requests > 0);
+
+ for (i = 0; i < requests; i++) {
+ uint32_t seqno;
+ long jiffies;
+
+ igt_assert(getline(&line, &line_size, file) > 0);
+ items = sscanf(line, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
+ &seqno, &jiffies, &tail);
+ igt_assert(items == 3);
+ }
+ req_ok = true;
+ continue;
+ }
+
+ ringbuf_matched = sscanf(dashes, "--- ringbuffer = 0x%08x\n",
+ >t_offset);
+ if (ringbuf_matched == 1) {
+ unsigned int offset, command, expected_addr = 0;
+
+ if (!strstr(ring_name, expected_ring_name))
+ continue;
+ igt_assert(req_ok);
+
+ for (i = 0; i < tail / 4; i++) {
+ igt_assert(getline(&line, &line_size, file) > 0);
+ items = sscanf(line, "%08x : %08x\n",
+ &offset, &command);
+ igt_assert(items == 2);
+ if ((command & 0x1F800000) == MI_BATCH_BUFFER_START) {
+ igt_assert(getline(&line, &line_size, file) > 0);
+ items = sscanf(line, "%08x : %08x\n",
+ &offset, &expected_addr);
+ igt_assert(items == 2);
+ i++;
+ }
+ }
+ if (intel_gen(devid) >= 4)
+ igt_assert(expected_addr == expected_offset);
+ else
+ igt_assert((expected_addr & ~0x1) == expected_offset);
+ ringbuf_ok = true;
+ continue;
+ }
+
+ if (bb_ok && req_ok && ringbuf_ok)
+ break;
+ }
+ igt_assert(bb_ok && req_ok && ringbuf_ok);
+
+ free(line);
+ free(ring_name);
+ close(debug_fd);
+}
+
+static void test(int fd, uint32_t handle, unsigned ring_id, const char *ring_name)
+{
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 exec;
+ uint64_t presumed_offset;
+ enum stop_ring_flags flags;
+
+ gem_require_ring(fd, ring_id);
+
+ clear_error_state();
+
+ exec.handle = handle;
+ exec.relocation_count = 0;
+ exec.relocs_ptr = 0;
+ exec.alignment = 0;
+ exec.offset = 0;
+ exec.flags = 0;
+ exec.rsvd1 = 0;
+ exec.rsvd2 = 0;
+
+ execbuf.buffers_ptr = (uintptr_t)&exec;
+ execbuf.buffer_count = 1;
+ execbuf.batch_start_offset = 0;
+ execbuf.batch_len = 16;
+ execbuf.cliprects_ptr = 0;
+ execbuf.num_cliprects = 0;
+ execbuf.DR1 = 0;
+ execbuf.DR4 = 0;
+ execbuf.flags = ring_id;
+ i915_execbuffer2_set_context_id(execbuf, 0);
+ execbuf.rsvd2 = 0;
+
+ gem_execbuf(fd, &execbuf);
+ gem_sync(fd, handle);
+
+ presumed_offset = exec.offset;
+
+ flags = igt_to_stop_ring_flag(ring_id);
+ igt_set_stop_rings(flags);
+
+ gem_execbuf(fd, &execbuf);
+ gem_sync(fd, handle);
+
+ igt_assert(igt_get_stop_rings() == STOP_RING_NONE);
+ igt_assert(presumed_offset == exec.offset);
+
+ check_error_state(ring_name, exec.offset);
+}
+
+uint32_t handle;
+int fd;
+
+igt_main
+{
+ igt_fixture {
+ fd = drm_open_any();
+
+ handle = gem_create(fd, 4096);
+ gem_write(fd, handle, 0, batch, sizeof(batch));
+
+ devid = intel_get_drm_devid(fd);
+ }
+
+ igt_subtest("render")
+ test(fd, handle, I915_EXEC_RENDER, "render ring");
+
+ igt_subtest("bsd")
+ test(fd, handle, I915_EXEC_BSD, "bsd ring");
+
+ igt_subtest("blt")
+ test(fd, handle, I915_EXEC_BLT, "blitter ring");
+
+ igt_subtest("vebox")
+ test(fd, handle, I915_EXEC_VEBOX, "video enhancement ring");
+
+ igt_fixture {
+ gem_close(fd, handle);
+
+ close(fd);
+ }
+}