diff mbox

[37/50] drm/i915/bdw: Don't write PDP in the legacy way when using LRCs

Message ID 1399637360-4277-38-git-send-email-oscar.mateo@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

oscar.mateo@intel.com May 9, 2014, 12:09 p.m. UTC 
From: Oscar Mateo <oscar.mateo@intel.com>

This is mostly for correctness so that we know we are running the LR
context correctly (this is, the PDPs are contained inside the context
object).

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a0993c0..de4a982 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -240,11 +240,15 @@  static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
 			  struct intel_engine *ring,
 			  bool synchronous)
 {
+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	int i, ret;
 
 	/* bit of a hack to find the actual last used pd */
 	int used_pd = ppgtt->num_pd_entries / GEN8_PDES_PER_PAGE;
 
+	if (dev_priv->lrc_enabled)
+		return 0;
+
 	for (i = used_pd - 1; i >= 0; i--) {
 		dma_addr_t addr = ppgtt->pd_dma_addr[i];
 		ret = gen8_write_pdp(ring, i, addr, synchronous);