From patchwork Sat May 10 03:59:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 4146321 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4FB0F9F23C for ; Sat, 10 May 2014 04:02:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 618E4200B4 for ; Sat, 10 May 2014 04:02:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5B66B201DE for ; Sat, 10 May 2014 04:02:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D51E06F099; Fri, 9 May 2014 21:01:59 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.bwidawsk.net (bwidawsk.net [166.78.191.112]) by gabe.freedesktop.org (Postfix) with ESMTP id CCDFD6F097 for ; Fri, 9 May 2014 21:01:58 -0700 (PDT) Received: by mail.bwidawsk.net (Postfix, from userid 5001) id D34B15809A; Fri, 9 May 2014 21:01:57 -0700 (PDT) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from ironside.intel.com (c-24-21-100-90.hsd1.or.comcast.net [24.21.100.90]) by mail.bwidawsk.net (Postfix) with ESMTPSA id 2EE845808E; Fri, 9 May 2014 21:00:21 -0700 (PDT) From: Ben Widawsky To: Intel GFX Date: Fri, 9 May 2014 20:59:29 -0700 Message-Id: <1399694391-3935-35-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1399694391-3935-1-git-send-email-benjamin.widawsky@intel.com> References: <1399694391-3935-1-git-send-email-benjamin.widawsky@intel.com> Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 34/56] drm/i915: num_pd_pages/num_pd_entries isn't useful X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP These values are never quite useful for dynamic allocations of the page tables. Getting rid of them will help prevent later confusion. TODO: this probably needs to be earlier in the series Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c | 11 ++++----- drivers/gpu/drm/i915/i915_gem_gtt.c | 45 ++++++++++--------------------------- drivers/gpu/drm/i915/i915_gem_gtt.h | 7 ++++-- 3 files changed, 21 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 921d898..40aca7f 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1814,13 +1814,12 @@ static int i915_swizzle_info(struct seq_file *m, void *data) static size_t gen6_ppgtt_count_pt_pages(struct i915_hw_ppgtt *ppgtt) { - struct i915_pagedir *pd = &ppgtt->pd; - struct i915_pagetab **pt = &pd->page_tables[0]; + struct i915_pagetab *pt; size_t cnt = 0; - int i; + uint32_t useless; - for (i = 0; i < ppgtt->num_pd_entries; i++) { - if (pt[i] != ppgtt->scratch_pt) + gen6_for_all_pdes(pt, ppgtt, useless) { + if (pt != ppgtt->scratch_pt) cnt++; } @@ -1844,8 +1843,6 @@ static void gen8_ppgtt_info(struct seq_file *m, struct drm_device *dev, int verb if (!ppgtt) return; - seq_printf(m, "Page directories: %d\n", ppgtt->num_pd_pages); - seq_printf(m, "Page tables: %d\n", ppgtt->num_pd_entries); for_each_ring(ring, dev_priv, unused) { seq_printf(m, "%s\n", ring->name); for (i = 0; i < 4; i++) { diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index a895f4b..a646475 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -617,22 +617,14 @@ static int gen8_ppgtt_alloc_pagedirs(struct i915_pagedirpo *pdp, pdp->pagedirs[pdpe] = alloc_pd_single(ppgtt->base.dev); if (IS_ERR(ppgtt->pdp.pagedirs[pdpe])) goto unwind_out; - - ppgtt->num_pd_pages++; } - BUG_ON(ppgtt->num_pd_pages > GEN8_LEGACY_PDPES); - return 0; unwind_out: - while (pdpe--) { + while (pdpe--) free_pd_single(ppgtt->pdp.pagedirs[pdpe], ppgtt->base.dev); - ppgtt->num_pd_pages--; - } - - WARN_ON(ppgtt->num_pd_pages); return -ENOMEM; } @@ -655,12 +647,8 @@ static int gen8_ppgtt_alloc(struct i915_hw_ppgtt *ppgtt, ppgtt->base.dev); if (ret) goto err_out; - - ppgtt->num_pd_entries += I915_PDES_PER_PD; } - BUG_ON(pdpe > ppgtt->num_pd_pages); - return 0; /* TODO: Check this for all cases */ @@ -682,7 +670,6 @@ err_out: static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size) { const int max_pdp = DIV_ROUND_UP(size, 1 << 30); - const int min_pt_pages = I915_PDES_PER_PD * max_pdp; int i, j, ret; if (size % (1<<30)) @@ -731,27 +718,21 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size) ppgtt->base.insert_entries = gen8_ppgtt_insert_entries; ppgtt->base.cleanup = gen8_ppgtt_cleanup; - DRM_DEBUG_DRIVER("Allocated %d pages for page directories (%d wasted)\n", - ppgtt->num_pd_pages, ppgtt->num_pd_pages - max_pdp); - DRM_DEBUG_DRIVER("Allocated %d pages for page tables (%lld wasted)\n", - ppgtt->num_pd_entries, - (ppgtt->num_pd_entries - min_pt_pages) + size % (1<<30)); return 0; } static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m) { struct i915_address_space *vm = &ppgtt->base; + struct i915_pagetab *unused; gen6_gtt_pte_t scratch_pte; uint32_t pd_entry; - int pte, pde; + uint32_t pte, pde, temp; + uint32_t start = ppgtt->base.start, length = ppgtt->base.total; scratch_pte = vm->pte_encode(vm->scratch.addr, I915_CACHE_LLC, true); - seq_printf(m, " VM %p (pd_offset %x-%x):\n", vm, - ppgtt->pd.pd_offset, - ppgtt->pd.pd_offset + ppgtt->num_pd_entries); - for (pde = 0; pde < ppgtt->num_pd_entries; pde++) { + gen6_for_each_pde(unused, &ppgtt->pd, start, length, temp, pde) { u32 expected; gen6_gtt_pte_t *pt_vaddr; dma_addr_t pt_addr = ppgtt->pd.page_tables[pde]->daddr; @@ -1229,12 +1210,12 @@ static void gen6_teardown_va_range(struct i915_address_space *vm, static void gen6_ppgtt_free(struct i915_hw_ppgtt *ppgtt) { - int i; + struct i915_pagetab *pt; + uint32_t pde; - for (i = 0; i < ppgtt->num_pd_entries; i++) { - struct i915_pagetab *pt = ppgtt->pd.page_tables[i]; + gen6_for_all_pdes(pt, ppgtt, pde) { if (pt != ppgtt->scratch_pt) - free_pt_single(ppgtt->pd.page_tables[i], ppgtt->base.dev); + free_pt_single(pt, ppgtt->base.dev); } /* Consider putting this as part of pd free. */ @@ -1293,7 +1274,6 @@ alloc: if (ppgtt->node.start < dev_priv->gtt.mappable_end) DRM_DEBUG("Forced to use aperture for PDEs\n"); - ppgtt->num_pd_entries = I915_PDES_PER_PD; return 0; err_out: @@ -1312,8 +1292,7 @@ static int gen6_ppgtt_alloc(struct i915_hw_ppgtt *ppgtt, bool preallocate_pt) if (!preallocate_pt) return 0; - ret = alloc_pt_range(&ppgtt->pd, 0, ppgtt->num_pd_entries, - ppgtt->base.dev); + ret = alloc_pt_range(&ppgtt->pd, 0, I915_PDES_PER_PD, ppgtt->base.dev); if (ret) { free_pt_scratch(ppgtt->scratch_pt, ppgtt->base.dev); drm_mm_remove_node(&ppgtt->node); @@ -1362,7 +1341,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt, bool aliasing) ppgtt->base.insert_entries = gen6_ppgtt_insert_entries; ppgtt->base.cleanup = gen6_ppgtt_cleanup; ppgtt->base.start = 0; - ppgtt->base.total = ppgtt->num_pd_entries * GEN6_PTES_PER_PT * PAGE_SIZE; + ppgtt->base.total = I915_PDES_PER_PD * GEN6_PTES_PER_PT * PAGE_SIZE; ppgtt->debug_dump = gen6_dump_ppgtt; ppgtt->pd.pd_offset = @@ -1602,7 +1581,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev) if (i915_is_ggtt(vm)) ppgtt = dev_priv->mm.aliasing_ppgtt; - gen6_map_page_range(dev_priv, &ppgtt->pd, 0, ppgtt->num_pd_entries); + gen6_map_page_range(dev_priv, &ppgtt->pd, 0, I915_PDES_PER_PD); } i915_gem_chipset_flush(dev); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 5c6db90..a581b33 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -260,8 +260,6 @@ struct i915_hw_ppgtt { struct i915_address_space base; struct kref ref; struct drm_mm_node node; - unsigned num_pd_entries; - unsigned num_pd_pages; /* gen8+ */ union { struct i915_pagedirpo pdp; struct i915_pagedir pd; @@ -328,6 +326,11 @@ struct i915_gtt { temp = min(temp, (unsigned)length), \ start += temp, length -= temp) +#define gen6_for_all_pdes(pt, ppgtt, iter) \ + for (iter = 0, pt = ppgtt->pd.page_tables[iter]; \ + iter < gen6_pde_index(ppgtt->base.total); \ + pt = ppgtt->pd.page_tables[++iter]) + static inline uint32_t i915_pte_index(uint64_t address, uint32_t pde_shift) { const uint32_t mask = NUM_PTE(pde_shift) - 1;