From patchwork Fri Jun 13 16:07:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 4350441 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 25EAABEECB for ; Fri, 13 Jun 2014 16:07:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3CF55201B9 for ; Fri, 13 Jun 2014 16:07:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9CC9B2022A for ; Fri, 13 Jun 2014 16:06:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 277906EAA8; Fri, 13 Jun 2014 09:06:59 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from gproxy8-pub.mail.unifiedlayer.com (gproxy8-pub.mail.unifiedlayer.com [67.222.33.93]) by gabe.freedesktop.org (Postfix) with SMTP id 900976EAA5 for ; Fri, 13 Jun 2014 09:06:56 -0700 (PDT) Received: (qmail 3158 invoked by uid 0); 13 Jun 2014 16:06:56 -0000 Received: from unknown (HELO cmgw2) (10.0.90.83) by gproxy8.mail.unifiedlayer.com with SMTP; 13 Jun 2014 16:06:56 -0000 Received: from box514.bluehost.com ([74.220.219.114]) by cmgw2 with id Ds6q1o0142UhLwi01s6t7b; Fri, 13 Jun 2014 10:06:55 -0600 X-Authority-Analysis: v=2.1 cv=Q9RBveGa c=1 sm=1 tr=0 a=9W6Fsu4pMcyimqnCr1W0/w==:117 a=9W6Fsu4pMcyimqnCr1W0/w==:17 a=cNaOj0WVAAAA:8 a=f5113yIGAAAA:8 a=JeYVxIB2bfsA:10 a=3ROhxo7VqVMA:10 a=TBVoxVdAAAAA:8 a=QyXUC8HyAAAA:8 a=GhZ5P8ky69gA:10 a=noBwr2J6l1kA:10 a=3qaHU9ALmMjirqkWSbwA:9 a=rW6DTWptwo0A:10 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=IVgMYzaw5BljW8bsT998nlP+8QZ1hMhxSCs2Hbx7zwc=; b=PcBEj3/9ObrIX3YSPWqBCvzp/fzN2YRYmI9cJ6withL7S//7i66c9o4iy9nvEMZdeuLsTJZ7LmOYUhNQ9NSGhvkc2soXb3duUuWwc+xtPe36e9kIY5Q1ZMGiq2TXsEO6; Received: from [67.161.37.189] (port=56568 helo=jbarnes-desktop.intel.com) by box514.bluehost.com with esmtpsa (TLSv1.1:DHE-RSA-AES256-SHA:256) (Exim 4.82) (envelope-from ) id 1WvU0B-0003Qy-ES for intel-gfx@lists.freedesktop.org; Fri, 13 Jun 2014 10:06:51 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Fri, 13 Jun 2014 09:07:00 -0700 Message-Id: <1402675620-21599-2-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402675620-21599-1-git-send-email-jbarnes@virtuousgeek.org> References: <1402675620-21599-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 2/2] drm/i915: re-order ppgtt sanitize logic X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_BL_SPAMCOP_NET, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Put hw limitations first, disabling ppgtt if necessary right away. After that, check user passed args or auto-detect and do the right thing, falling back to aliasing PPGTT if the user tries to enable full PPGTT but it isn't available. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_gem_gtt.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index d45303d..68648f5 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -35,15 +35,6 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv); static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt) { - if (enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev)) - return 0; - - if (enable_ppgtt == 1) - return 1; - - if (enable_ppgtt == 2 && HAS_PPGTT(dev)) - return 2; - #ifdef CONFIG_INTEL_IOMMU /* Disable ppgtt on SNB if VT-d is on. */ if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) { @@ -56,10 +47,22 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt) if (IS_VALLEYVIEW(dev) && dev->pdev->revision < 0xc) return 0; - if (HAS_PPGTT(dev)) - return 2; + if (!HAS_ALIASING_PPGTT(dev)) + return 0; - return HAS_ALIASING_PPGTT(dev) ? 1 : 0; + /* Check user passed enable_ppgtt param and try to honor it */ + switch (enable_ppgtt) { + case 0: + return 0; + case 1: + return 1; /* caught any hw limits above */ + case 2: + /* fall through to auto-detect */ + default: /* auto-detect */ + if (HAS_PPGTT(dev)) + return 2; + return HAS_ALIASING_PPGTT(dev) ? 1 : 0; + } }