From patchwork Thu Jun 26 17:24:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 4429291 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A1E6F9FBC3 for ; Thu, 26 Jun 2014 17:26:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5D3D420379 for ; Thu, 26 Jun 2014 17:26:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 828E7203AB for ; Thu, 26 Jun 2014 17:25:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E9066E2FA; Thu, 26 Jun 2014 10:25:53 -0700 (PDT) X-Original-To: Intel-GFX@lists.freedesktop.org Delivered-To: Intel-GFX@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id C63C26E246 for ; Thu, 26 Jun 2014 10:25:43 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 26 Jun 2014 10:25:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,554,1400050800"; d="scan'208";a="561434803" Received: from johnharr-linux.iwi.intel.com ([172.28.253.52]) by fmsmga002.fm.intel.com with ESMTP; 26 Jun 2014 10:25:28 -0700 From: John.C.Harrison@Intel.com To: Intel-GFX@lists.freedesktop.org Date: Thu, 26 Jun 2014 18:24:19 +0100 Message-Id: <1403803475-16337-29-git-send-email-John.C.Harrison@Intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1403803475-16337-1-git-send-email-John.C.Harrison@Intel.com> References: <1403803475-16337-1-git-send-email-John.C.Harrison@Intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [RFC 28/44] drm/i915: Added scheduler flush calls to ring throttle and idle functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: John Harrison When requesting that all GPU work is completed, it is now necessary to get the scheduler involved in order to flush out work that queued and not yet submitted. --- drivers/gpu/drm/i915/i915_gem.c | 16 +++++++++++++++- drivers/gpu/drm/i915/i915_scheduler.c | 7 +++++++ drivers/gpu/drm/i915/i915_scheduler.h | 5 +++++ 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index aa1e0b2..1c508b7 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3049,6 +3049,10 @@ int i915_gpu_idle(struct drm_device *dev) /* Flush everything onto the inactive list. */ for_each_ring(ring, dev_priv, i) { + ret = I915_SCHEDULER_FLUSH_ALL(ring, true); + if (ret < 0) + return ret; + ret = i915_switch_context(ring, ring->default_context); if (ret) return ret; @@ -4088,7 +4092,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file) struct intel_engine_cs *ring = NULL; unsigned reset_counter; u32 seqno = 0; - int ret; + int i, ret; ret = i915_gem_wait_for_error(&dev_priv->gpu_error); if (ret) @@ -4098,6 +4102,16 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file) if (ret) return ret; + for_each_ring(ring, dev_priv, i) { + /* Need a mechanism to flush out scheduler entries that were + * submitted more than 'recent_enough' time ago as well! In the + * meantime, just flush everything out to ensure that entries + * can not sit around indefinitely. */ + ret = I915_SCHEDULER_FLUSH_ALL(ring, false); + if (ret < 0) + return ret; + } + spin_lock(&file_priv->mm.lock); list_for_each_entry(request, &file_priv->mm.request_list, client_list) { if (time_after_eq(request->emitted_jiffies, recent_enough)) diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c index d579bab..6b6827f 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.c +++ b/drivers/gpu/drm/i915/i915_scheduler.c @@ -125,6 +125,13 @@ int i915_scheduler_flush_seqno(struct intel_engine_cs *ring, bool is_locked, return 0; } +int i915_scheduler_flush(struct intel_engine_cs *ring, bool is_locked) +{ + /* Do stuff... */ + + return 0; +} + bool i915_scheduler_is_seqno_in_flight(struct intel_engine_cs *ring, uint32_t seqno, bool *completed) { diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h index 3811359..898d2bb 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.h +++ b/drivers/gpu/drm/i915/i915_scheduler.h @@ -58,9 +58,13 @@ struct i915_scheduler_queue_entry { }; #ifdef CONFIG_DRM_I915_SCHEDULER +# define I915_SCHEDULER_FLUSH_ALL(ring, locked) \ + i915_scheduler_flush(ring, locked) + # define I915_SCHEDULER_FLUSH_SEQNO(ring, locked, seqno) \ i915_scheduler_flush_seqno(ring, locked, seqno) #else +# define I915_SCHEDULER_FLUSH_ALL(ring, locked) 0 # define I915_SCHEDULER_FLUSH_SEQNO(ring, locked, seqno) 0 #endif @@ -81,6 +85,7 @@ struct i915_scheduler { int i915_scheduler_fly_seqno(struct intel_engine_cs *ring, uint32_t seqno); int i915_scheduler_remove(struct intel_engine_cs *ring); +int i915_scheduler_flush(struct intel_engine_cs *ring, bool is_locked); int i915_scheduler_flush_seqno(struct intel_engine_cs *ring, bool is_locked, uint32_t seqno); bool i915_scheduler_is_seqno_in_flight(struct intel_engine_cs *ring,